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首页> 外文会议>13th International Workshop on Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation PATMOS 2003; Sep 10-12, 2003; Turin, Italy >A Flexible Framework for Fast Multi-objective Design Space Exploration of Embedded Systems
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A Flexible Framework for Fast Multi-objective Design Space Exploration of Embedded Systems

机译：嵌入式系统快速多目标设计空间探索的灵活框架

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摘要

The evaluation of the best system-level architecture in terms of energy and performance is of mainly importance for a broad range of embedded SOC platforms. In this paper, we address the problem of the efficient exploration of the architectural design space for parameterized microprocessor-based systems. The architectural design space is multi-objective, so our aim is to find all the Pareto-optimal configurations representing the best power-performance design trade-offs by varying the architectural parameters of the target system. In particular, the paper presents a Design Space Exploration (DSE) framework tuned to efficiently derive Pareto-optimal curves. The main characteristics of the proposed framework consist of its flexibility and modularity, mainly in terms of target architecture, related system-level executable models, exploration algorithms and system-level metrics. The analysis of the proposed framework has been carried out for a parameterized superscalar architecture executing a selected set of benchmarks. The reported results have shown a reduction of the simulation time of up to three orders of magnitude with respect to the full search strategy, while maintaining a good level of accuracy (under 4% on average).
机译：就广泛的嵌入式SOC平台而言，就能源和性能而言，最佳系统级体系结构的评估至关重要。在本文中，我们解决了有效探索基于参数化微处理器系统的体系结构设计空间的问题。架构设计空间是多目标的，因此我们的目标是通过改变目标系统的架构参数，找到代表最佳功率性能设计折衷的所有帕累托最优配置。特别是，本文提出了一种设计空间探索（DSE）框架，该框架经过调整可有效地导出Pareto-最佳曲线。所提出框架的主要特征包括它的灵活性和模块化性，主要是在目标体系结构，相关的系统级可执行模型，探索算法和系统级度量方面。已针对执行选定基准集的参数化超标量体系结构对提出的框架进行了分析。报告的结果表明，相对于完整搜索策略，仿真时间最多减少了三个数量级，同时保持了较高的准确度（平均低于4％）。

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