• 主题
高级搜索  >
历史搜索 清空历史
首页> 外文会议>MELECON 2010;IEEE Mediterranean Electrotechnical Conference >A fast cycle-accurate instruction set simulator based on QEMU and SystemC for SoC development
【24h】

A fast cycle-accurate instruction set simulator based on QEMU and SystemC for SoC development

机译：基于QEMU和SystemC的快速周期精确指令集模拟器，用于SoC开发

获取原文
获取原文并翻译 | 示例
页面导航
  • 摘要
  • 著录项
  • 相似文献
  • 相关主题

摘要

This paper presents a fast cycle-accurate instruction set simulator (CA-ISS) based on QEMU and SystemC. The CA-ISS can be used for design space exploration and as the processor core for virtual platform construction at the cycle-accurate level. Even though most state-of-the-art commercial tools try to provide all the levels of details to satisfy the different requirements of the software designer, the hardware designer, or even the system architect, the hardware/software co-simulation speed is dramatically slow when co-simulating the hardware models at the register-transfer level with a full-fledged operating system. In this paper, we show that the combination of QEMU and SystemC can make the co-simulation at the cycle-accurate level extremely fast, even with a full-fledged operating system up and running. Our experimental results indicate that with every instruction executed and every memory accessed since power-on traced at the cycle-accurate level, it takes less than 17 minutes on average to boot up a full-fledged Linux kernel, even on a laptop.
机译：本文提出了一种基于QEMU和SystemC的快速周期精确指令集模拟器（CA-ISS）。 CA-ISS可以用于设计空间探索，并可以在周期精确的级别上用作虚拟平台构建的处理器核心。即使大多数最先进的商业工具都试图提供所有级别的详细信息，以满足软件设计人员，硬件设计人员甚至系统架构师的不同要求，但硬件/软件的协同仿真速度却是惊人的与成熟的操作系统在寄存器传输级别上共同仿真硬件模型时，速度较慢。在本文中，我们证明了QEMU和SystemC的组合可以使在周期精确度级别上的协同仿真变得非常快，即使在运行完整的操作系统的情况下。我们的实验结果表明，自从以精确到周期的级别跟踪加电以来，每执行一条指令并访问所有内存，即使是在笔记本电脑上，启动成熟的Linux内核平均也要花费不到17分钟的时间。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱：kefu@zhangqiaokeyan.com

京公网安备：11010802029741号 ICP备案号：京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有

  • 客服微信

  • 服务号