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首页> 外文会议>2010 27th International Conference on Microelectronics Proceedings >TCAD modeling of NPN-SiGe-HBT electrical performance improvement through extrinsic stress layer
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TCAD modeling of NPN-SiGe-HBT electrical performance improvement through extrinsic stress layer

机译：通过外部应力层改善NPN-SiGe-HBT电性能的TCAD建模

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The impact of introducing an extrinsic stress layer to NPN-SiGe-HBT device on the electrical properties and frequency response has been studied using TCAD modeling. Simulations based on Hydrodynamic (HD) and Drift-Diffusion (DD) models have been carried out to clarify the influence of adding the extrinsic stress layer on the device electrical performance (static and dynamic). Simulation results show that NPN-SiGe-HBT device with extrinsic stress layer exhibit better frequency characteristics in comparison with equivalent conventional HBT device (without extrinsic stress layer). An approximately, 3% improvement in ft, and 5% improvement in fmax have been achieved. In addition to that, a decrease in the transit time of the device has been observed. That can be fully accounted to the influence of introducing the extrinsic stress layer on the device.
机译：使用TCAD建模研究了向NPN-SiGe-HBT器件中引入外部应力层对电性能和频率响应的影响。已经进行了基于流体动力学（HD）和漂移扩散（DD）模型的仿真，以阐明添加外部应力层对器件电气性能（静态和动态）的影响。仿真结果表明，带外应力层的NPN-SiGe-HBT器件与等效的传统HBT器件（无外应力层）相比，具有更好的频率特性。 f t 大约改善了3％，f max 改善了5％。除此之外，已经观察到设备的通过时间的减少。可以完全考虑到在器件上引入外部应力层的影响。

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