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Unequal error protection with CRC-16 bits in EPC class-1 generation-2 UHF RFID systems

机译:EPC 1类第二代UHF RFID系统中具有CRC-16位的不平等错误保护

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This paper deals with cyclic-redundancy-check (CRC) bits stored in the memory of tags of electronic product code (EPC) class-1 generation-2 UHF radio-frequency identification (RFID) systems. It is shown that tag memory bits transmitted via backscattering to a reader have two levels of error protection. The structure and properties of the underlying binary linear unequal-error-protection (UEP) (128,112,4) code are studied. The amount of redundancy provided by the 16 CRC bits is shown to be sufficient for the decoder in the reader to correct all single-bit errors and 79% of all possible double-bit errors. Moreover, the number of tag memory bits with additional error protection as well as the structure of the associated correctable error patterns are established.
机译:本文处理存储在电子产品代码(EPC)1类第2代UHF射频识别(RFID)系统的标签存储器中的循环冗余校验(CRC)位。结果表明,通过反向散射传输到读取器的标签存储位具有两个级别的错误保护。研究了基础二进制线性不等错误保护(UEP)(128,112,4)代码的结构和性质。由16个CRC比特提供的冗余量已显示为足以使阅读器中的解码器纠正所有单比特错误和所有可能的双比特错误的79%。此外,建立具有附加错误保护的标签存储位的数量以及相关的可校正错误模式的结构。

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