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首页> 外文会议>2013 IEEE International Symposium on the Applications of Ferroelectric and Workshop on the Piezoresponse Force Microscopy >Thin film Barium-Strontium-Titanate Parallel-Plate varactors integrated on low-resistivity silicon and saphhire substrate
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Thin film Barium-Strontium-Titanate Parallel-Plate varactors integrated on low-resistivity silicon and saphhire substrate

机译：集成在低电阻硅和蓝宝石衬底上的薄膜钡锶钛酸盐平行平板变容二极管

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摘要

Barium-Strontium-Titanate (BST) thin film based ferroelectric varactors are designed at specific capacitances under 0V dc bias on CMOS compatible low-resistivity silicon substrate. The BST varactor device operation is based on the nonlinear dielectric tunability of BST thin film sandwiched between two metal plates in a revised conductor-backed coplanar waveguide (CBCPW) transmission line configuration. The varactor capacitance at 0V dc bias is determined by the overlap area between the CPW signal line in the top metal electrode and a tapered shunt line in the bottom electrode. Therefore a series of devices with unbiased capacitances ranging from 0.8pF to 4.8pF were designed and fabricated based on changing their corresponding overlap areas according to the generic parallel plate capacitance equation. A schematic model was also utilized to extract the designed and measured capacitances. The relationships between the sizes of overlap areas and the extracted capacitances from the electromagnetic and schematic models are demonstrated by a reasonable agreement with the experimental measurements from fabricated devices. Devices were also designed and fabricated on sapphire substrate with three layout variations aiming to modify the parasitic resistance.
机译：基于钛酸锶钡（BST）薄膜的铁电变容二极管是在CMOS兼容低电阻率硅基板上，在0V直流偏置下以特定电容设计的。 BST变容二极管器件的工作基于在改进的背衬导体共面波导（CBCPW）传输线配置中夹在两个金属板之间的BST薄膜的非线性介电可调性。直流偏置为0V时的变容电容由顶部金属电极中CPW信号线和底部电极中的锥形分流线之间的重叠面积决定。因此，根据通用平行板电容方程，通过改变其对应的重叠面积，设计并制造了一系列电容范围从0.8pF至4.8pF的器件。原理图模型也用于提取设计和测量的电容。重叠区域的大小与从电磁模型和原理图模型中提取的电容之间的关系通过与制造设备的实验测量结果的合理吻合得到证明。器件还设计和制造在蓝宝石衬底上，具有三种布局变化，旨在改变寄生电阻。

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