A novel, high speed window comparator circuit

机译：新型高速窗口比较器电路

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摘要

Circuits with voltage hysteresis properties are often utilized in systems operating under noisy input conditions. A very simple window comparator circuit is described in this paper, which can be used in low voltage and fast varying input conditions. The proposed circuit was simulated using LTspice-IV and experimental results are presented.

机译：具有电压磁滞特性的电路通常用于在噪声输入条件下工作的系统。本文描述了一种非常简单的窗口比较器电路，该电路可用于低压和快速变化的输入条件。利用LTspice-IV对所提出的电路进行了仿真，并给出了实验结果。

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来源
《2013 International Conference on Circuits, Power and Computing Technologies》|2013年|691-693|共3页
会议地点 Nagercoil(IN)
作者
Sagar Pankaj; Madhava Panicker P.R.;
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作者单位

Dept of Applied Electronics Instrumentation, Rajagiri School of Engineering Technology, Kakkanad - 682039, Indiac;

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会议组织
原文格式 PDF
正文语种 eng
中图分类
关键词
Logic gates; Slew Rate; Window comparator circuit;

机译：逻辑门;转换率;窗口比较器电路;;

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A novel, high speed window comparator circuit

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