A residue to binary converter for a balanced moduli set {2^2n#x002B;1 #x2212; 1, 2²ⁿ, 2^{2n #x2212; 1}}

机译：用于平衡模数集{2 ^{2n + 1 − 1，2 ^{2n ，2 ^{2n − 1 }的残差二进制转换器}}}

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In this paper, we propose a new moduli set {2²ⁿ⁺¹ − 1, 2²ⁿ;2^{2n − l}} with its associated reverse converter. The proposed reverse converter is based on Mixed Radix Conversion (MRC). In addition to parallelizing and optimizing the MRC algorithm, the resulting architecture is further simplified in order to obtain a reverse converter that utilizes only 2 levels of Carry Save Adders and three Carry Propagate Adders. The proposed converter is purely adder based and memoryless. Our proposal has a delay of (10n + 4)tfa + 2tmUx with an area cost of (12n + 2)FAs and {2n)H As, which when expressed in terms of HA is (22n + 4), where FA, HA, and tfa represent Full Adder, Half Adder, and delay of a Full Adder, respectively. The proposed scheme is compared with state of the art similar dynamic range converters. Theoretically speaking, our proposal achieves about 62.3% hardware reduction and about 2.13% speed improvement when compared with the reverse converter for {2ⁿ + 1,2ⁿ 1, 2²ⁿ⁺¹ − 3, 2²ⁿ − 2}. Also, in comaprison with the converter for {2ⁿ − 1, 2ⁿ − 1, 2²ⁿ⁺¹ − l}, the results indicate that, our proposal is about 17.05% faster, but requires about 7.83% more hardware resources. Further, the area time square (ΔT²) metric indicates that our proposed converter is 62.3% and 24.77% better than the state of the art reverse converters for {2ⁿ + 1,2ⁿ − 1, 2²ⁿ⁺¹ − 3, 2²ⁿ − 2} and {2ⁿ − 1, 2ⁿ + 1, 2²ⁿ, 2²ⁿ⁺¹ − l} respectively.

机译：在本文中，我们提出了一个新的模集{2 ^{2n + 1 − 1，2 ^{2n ; 2 ^{2n − l }及其相关的反向转换器。提出的反向转换器基于混合基数转换（MRC）。除了并行化和优化MRC算法外，进一步简化了所得架构，以获得仅使用2级进位保存加法器和3个进位传播加法器的反向转换器。提出的转换器是纯粹基于加法器的，并且没有存储器。我们的建议有（10n + 4）tfa + 2tmUx的延迟，面积成本为（12n + 2）FAs和{2n）H As，用HA表示为（22n + 4），其中FA，HA ，和tfa分别代表Full Adder，Half Adder和Full Adder的延迟。将所提出的方案与现有技术的类似动态范围转换器进行比较。从理论上讲，与{2 ^{n + 1,2 ^{n 1，2 <的反向转换器相比，我们的建议可实现约62.3％的硬件减少和约2.13％的速度提高。 sup> 2n + 1 − 3，2 ^{2n − 2}。另外，与{2 ^{n -1，2 ^{n -1，1，2 ^{2n + 1 -l}的转换器相比较，结果表示，我们的建议速度提高了约17.05％，但所需硬件资源却增加了约7.83％。此外，面积时间平方（ΔT^{2 ）度量标准表明，对于{2 ^{n +，我们提出的转换器要比现有技术的逆向转换器好62.3％和24.77％。 1,2 ^{n − 1，2 ^{2n + 1 − 3，2 ^{2n − 2}和{2 ^{n − 1，2 ^{n + 1，2 ^{2n ，2 ^{2n + 1 − l}。}}}}}}}}}}}}}}}}}}

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来源
《2013 International Joint Conference on Awareness Science and Technology and Ubi-Media Computing》|2013年|211-216|共6页
会议地点 Aizuwakamatsu(JP)
作者
Bankas Edem Kwedzo; Gbolagade Kazeem Alagbe;
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作者单位

Department of Computer Science, Faculty of Mathematical Sciences, University for Development Studies, Navrongo, Ghanac;

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原文格式 PDF
正文语种 eng
中图分类
关键词
Dynamic Range; Mixed Radix Conversion; Moduli Set; Residue Number System; Reverse Converter;

机译：动态范围;混合基数转换;模数集;残数系统;反向转换器;;

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2. High Speed Residue to Binary Converter for the New Four-Moduli Set {22nn , 2n nn + 1, 2n n/2 + 1, 2n n/2−1} [J] . M. R. Noorimehr, M. Hosseinzadeh, R. Farshidi Arabian Journal for Science and Engineering . 2014,第4期

机译：用于新四模数集{22nn，2n nn +1，2n n / 2 + 1，2n n / 2-1}的高速残差二进制转换器
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4. RNS-to-Binary Converters for Two Four-Moduli Sets {2n?1,2n,2n+1,2n+1?1} and {2n?1,2n,2n+1,2n+1+1} [J] . Mohan P.V.A., Premkumar A.B. IEEE transactions on circuits and systems . I , Regular papers . 2007,第6期

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5. An area efficient RNS-to-binary converter for the {2n, 22n#x002B;1 #x2212;1, 2n #x2212;1} moduli set [C] . Siewobr H., Gbolagade K. A. IEEE International Conference on Adaptive Science and Technology . 2012

机译：用于{2 n ，2 2n＆＃x002b; 1 ＆＃x2212; 1,2 n 的区域有效的RNS - 二进制转换器。＆＃x2212; 1} moduli集
6. Low power modulo reduction technique and its application in residue-to-binary converters. [D] . Bi, Shaoqiang. 2004

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7. Relations in the cohomology ring of the moduli space of flat SO(2n + 1)-connections on a Riemann surface [O] . Elisheva Adina Gamse, Jonathan Weitsman -1

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机译：高效的基于MRC的残留为新模型的二进制转换器{22n，2n -1,2n + 1 -1}和{22n，2n -1,2n-1 -1}

A residue to binary converter for a balanced moduli set {22n#x002B;1 #x2212; 1, 22n, 22n #x2212; 1}

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A residue to binary converter for a balanced moduli set {2^2n#x002B;1 #x2212; 1, 2²ⁿ, 2^{2n #x2212; 1}}