Characterization of noise behavior of ultrathin inversion-channel and buried-channel SOI MOSFETs in the subthreshold bias range

机译：亚阈值偏置范围内超薄反向沟道和掩埋沟道SOI MOSFET噪声行为的表征

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This paper considers aspects of low-frequency noise in the inversion-channel SOI nMOSFET and the buried-channel SOI pMOSFET. Analyses suggest that the inversion channel is strongly influenced by interface traps, which also weakly influence the buried-channel. It is demonstrated that such aspects are significant in the subthreshold bias range.

机译：本文考虑了反向通道SOI nMOSFET和掩埋通道SOI pMOSFET中低频噪声的各个方面。分析表明，反转通道受界面陷阱的强烈影响，而界面陷阱也对埋藏通道的影响很小。证明了这些方面在亚阈值偏差范围内是重要的。

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来源
《2014 IEEE International Meeting for Future of Electron Devices, Kansai》|2014年|1-2|共2页
会议地点 Kyoto(JP)
作者
Ito T.; Sato S.; Omura Y.;
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作者单位

Grad. School Sci. and Eng., Kansai Univerwsity, Suita, Osaka 564#x002B;

8680, Japan;

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会议组织
原文格式 PDF
正文语种 eng
中图分类
关键词
Educational institutions; Electron traps; Logic gates; MOSFET; MOSFET circuits; Noise; Substrates; Low-frequency noise; SOI MOSFET; buried channel; inversion channel; subthreshold bias range;

机译：教育机构;电子陷阱逻辑门MOSFET; MOSFET电路；噪声;基材；低频噪声； SOI MOSFET;地下通道反转通道亚阈值偏差范围；;

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专利

1. Back-gate bias effect on the subthreshold behavior and the switching performance in an ultrathin SOI CMOS inverter operating at 77 and 300 K [J] . Kuo J.B., Lee W.C. IEEE Transactions on Electron Devices . 1992,第12期

机译：背栅偏置对工作在77和300 K的超薄SOI CMOS反相器中亚阈值行为和开关性能的影响
2. Electrical characterization of Random Telegraph Noise in Fully-Depleted Silicon-On-Insulator MOSFETs under extended temperature range and back-bias operation [J] . Marquez Carlos, Rodriguez Noel, Gamiz Francisco, Solid-State Electronics . 2016,第Mara期

机译：完全耗尽型绝缘硅上的MOSFET在扩展温度范围和反向偏置操作下的随机电报噪声的电特性
3. Simulation and two-dimensional analytical modeling of subthreshold slope in ultrathin-film SOI MOSFETs down to 0.1 mu m gate length [J] . Joachim H.-O., Yamaguchi Y. IEEE Transactions on Electron Devices . 1993,第10期

机译：栅极长度低至0.1μm的超薄膜SOI MOSFET亚阈值斜率的仿真和二维分析建模
4. Characterization of noise behavior of ultrathin inversion-channel and buried-channel SOI MOSFETs in the subthreshold bias range [C] . Ito T., Sato S., Omura Y. Institute of Electrical and Electronics Engineers International Meeting for Future of Electron Devices, Kansai . 2014

机译：超薄反转通道噪声行为的表征和亚阈值偏置范围内的掩埋频道SOI MOSFET
5. Low frequency noise as a characterization and reliability tool for the evaluation of advanced MOSFETs. [D] . Lim, Paul. 2009

机译：低频噪声是评估高级MOSFET的表征和可靠性工具。
6. Empirical and Theoretical Modeling of Low-Frequency Noise Behavior of Ultrathin Silicon-on-Insulator MOSFETs Aiming at Low-Voltage and Low-Energy Regime [O] . Yasuhisa Omura 2019

机译：面向低电压低能耗的超薄绝缘体上硅MOSFET低频噪声行为的经验和理论模型
7. Scaling and carrier transport behavior of buried-channel In0.7Ga0.3As MOSFETs with Al2O3 insulator [O] . Kim Taewoo, Kim Dae-Hyun 2015

机译：具有Al2O3绝缘体的掩埋沟道In0.7Ga0.3As MOSFET的缩放和载流子传输行为

Characterization of noise behavior of ultrathin inversion-channel and buried-channel SOI MOSFETs in the subthreshold bias range

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