Network on chip for data packet exchange

机译：片上网络用于数据包交换

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摘要

Making Network on Chip is carried out here, we introduce another system on-chip (Noc) that handles exact limitations of the flawed parts of the Noc. The proposed Noc is focused around new slip location components suitable for element Nocs, where the number and position of processor components or defective squares differ amid runtime. The Noc medium performs an abnormal state of modularity, adaptability, and throughput. A Noc includes switches and interconnections permitting correspondence between the PEs and/or Ips. The Noc depends on information parcel trade. The way for an information parcel between a source and a terminus through the switches is characterized by the steering calculation. Subsequently, the way that an information bundle is permitted to take in the system depends chiefly on the addictiveness allowed by the routing algorithm, which is connected provincially in every switch being crossed and to every information parcel.

机译：在这里进行片上网络制作，我们介绍了另一个片上系统（Noc），该系统可以处理Noc缺陷部分的确切限制。提议的Noc集中在适用于元素Nocs的新滑动位置组件上，其中处理器组件或缺陷正方形的数量和位置在运行时不同。 Noc介质执行异常的模块化，适应性和吞吐量状态。 Noc包括允许在PE和/或Ips之间进行对应的开关和互连。 Noc取决于信息包裹贸易。通过开关在源和终端之间打包信息的方式的特点是操纵计算。随后，信息束被允许进入系统的方式主要取决于路由算法所允许的成瘾性，该路由算法在每个被交叉的交换机和每个信息包中都被省级地连接。

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来源
《2014 International Conference on Science Engineering and Management Research》|2014年|1-4|共4页
会议地点 Chennai(IN)
作者
Krishna M. Vamsi; Ajitha D.;
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作者单位

Dept. of ECE, SITAMS, Chittoor, India;

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会议组织
原文格式 PDF
正文语种 eng
中图分类
关键词
multiprocessor interconnection networks; network-on-chip; data packet exchange; information parcel; network on chip; processor components; system on-chip; Instruments; Ports (Computers); Routing; System-on-chip; Throughput; Topology; Transient analysis; Multiprocessor system-on-chip(MPSOC); Network on chip(NOC); System on chip(SOC);

机译：多处理器互连网络;片上网络;数据包交换;信息包;片上网络;处理器组件;片上系统;仪器;端口（计算机）;路由;片上系统;吞吐量;拓扑;瞬态分析;多处理器片上系统（MPSOC）;片上网络（NOC）;片上系统（SOC）;;

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专利

1. Bit-Parallel Message Exchange and Data Recovery in Optical Packet Switched Interconnection Networks [J] . Odile Liboiron-Ladouceur, Carl Gray, David C. Keezer, IEEE Photonics Technology Letters . 2006,第6期

机译：光分组交换互连网络中的比特并行消息交换和数据恢复
2. Per-packet global congestion estimation for fast packet delivery in networks-on-chip [J] . Lotfi-Kamran Pejman Journal of supercomputing . 2015,第9期

机译：每个数据包的全局拥塞估计，用于片上网络中的快速数据包传递
3. Deadlock Free Routing Algorithm for Minimizing Data Packet Transmission in Network on Chip [J] . K. Somasundaram, Juha Plosila International journal of embedded and real-time communication systems . 2012,第1期

机译：最小化片上网络中数据包传输的无死锁路由算法
4. Network on chip for data packet exchange [C] . Krishna M. Vamsi, Ajitha D. International Conference on Science Engineering and Management Research . 2014

机译：数据包交换芯片网络
5. Packet switched scalable on-chip interconnection architecture design and implementation for Networks-on-Chip. [D] . Kim, Daewook. 2006

机译：片上网络的分组交换可扩展片上互连架构设计和实现。
6. Cooperative Sensing Data Collection and Distribution with Packet Collision Avoidance in Mobile Long-Thin Networks [O] . Lien-Wu Chen, Yu-Hao Peng, Yu-Chee Tseng, 2018

机译：移动瘦网络中的协作感知数据收集和分组冲突避免规避
7. Bit-Parallel Message Exchange and Data Recovery in Optical Packet Switched Interconnection Networks [O] . Odile Liboiron-ladouceur, Student Member, Carl Gray, 2006

机译：光分组交换互连网络中的比特并行消息交换和数据恢复

Network on chip for data packet exchange

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