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首页> 外文会议>2014 Joint IEEE International Symposium on the Applications of Ferroelectrics, International Workshop on Acoustic Transduction Materials and Devices amp; Workshop on Piezoresponse Force Microscopy >Evolution of ESD process capability in future electronic industry
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Evolution of ESD process capability in future electronic industry

机译：未来电子行业ESD工艺能力的发展

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摘要

The evolution in semiconductor and electronic packaging to fulfill mobility and miniaturization has drastically changed the nature of electronic industry. Electronic component are continuing to get more sensitive to EOS (electrical overstress) due to electrostatic Sensitivity, Although HBM (Human Body Model) for Electrostatic sensitive device (ESD) has not changed for the last two decades. In this article, the CDM (Charged Device Model) which is used in semiconductor device ESD sensitivity test will be explained for a potential situation where a semiconductor device is charged to a high voltage then discharged to a grounded surface. From the failure analysis data collected from the field in the past several years, it is clear that the number of failure caused by ESD has been increasing due to component electrostatic as sensitivity as 100V of CDM. It is perilous to find out the possible ESD source and risk in PCBA/SYS assembly process and make the corresponding remedy before the electronic board is build in the line. This article will give the general guideline to make this extended ESD control, and a working model will be developed to organize the mitigation plan and measures to be taken.
机译：半导体和电子封装在实现移动性和小型化方面的发展已极大地改变了电子工业的性质。尽管静电敏感设备（ESD）的HBM（人体模型）在过去的20年中没有发生变化，但由于静电敏感，电子元件仍对EOS（电气过应力）变得越来越敏感。在本文中，将对半导体器件ESD敏感性测试中使用的CDM（带电器件模型）进行说明，以解决半导体器件被充电至高电压然后放电至接地表面的潜在情况。根据过去几年从现场收集的故障分析数据，可以清楚地看到，由于组件静电（灵敏度为CDV的100V），由ESD引起的故障数量一直在增加。在PCBA / SYS组装过程中找出可能的ESD来源和风险并进行相应的补救措施是很危险的。本文将提供进行扩展的ESD控制的一般指南，并将开发一种工作模型来组织缓解计划和要采取的措施。

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