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High datarate rate regulated 4D 8PSK-TCM implementation in FPGA for satellite

机译:卫星FPGA的高数据速率调节4D 8PSK-TCM实现

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With the increase in camera resolution or usage of SAR payload in remote sensing satellite, demand for high data rate transmission has increased in a given bandwidth. This has also forced to use higher modulation like 8 PSK over QPSK to accommodate higher data rate in the same bandwidth. A typical usage is 1.2Gbps data rate transmission scheme using 8PSK dual polarization in x-Band, having bandwidth of 375Mhz. Higher modulation scheme demands higher power to maintain the link margin. Alternative to the higher power is to use a suitable channel coding scheme. 4D 8PSK-TCM is a channel coding scheme suitable for 8PSK modulation [1]. The coding scheme supports Spectral Efficiencies of 2, 2.25, 2.5 & 2.75 bits/channel-symbol. Challenges exist in implementation of these different code rates in a single architecture as it demands rate buffer implementation to provide seamless transmission that is difficult to realize without the use of FPGA. The paper addresses the difficulties in implementation especially when the 4D 8PSK-TCM module is inserted in Data-link layer. The solution to these difficulties is implementation of a suitable rate regulator for various code rate of 4D 8PSK-TCM in FPGA for high datarate (¿¿¿ 600Mbps) application. The paper also addresses 4D-TCM usages in data link layer of satellite transmission system
机译:随着摄像机分辨率的提高或遥感卫星中SAR负载的使用,在给定的带宽内,对高数据速率传输的需求已经增加。这也迫使使用更高的调制,例如QPSK上的8 PSK,以在相同带宽下适应更高的数据速率。典型的用法是在x波段中使用8PSK双极化的1.2Gbps数据速率传输方案,带宽为375Mhz。更高的调制方案需要更高的功率来维持链路余量。更高功率的替代方案是使用合适的信道编码方案。 4D 8PSK-TCM是一种适用于8PSK调制的信道编码方案[1]。编码方案支持2、2.25、2.5和2.75比特/通道符号的频谱效率。在单个体系结构中实现这些不同的码率存在挑战,因为它要求实现码率缓冲区以提供无缝传输,而如果不使用FPGA则很难实现无缝传输。本文解决了实施中的困难,尤其是在将4D 8PSK-TCM模块插入数据链路层时。解决这些难题的方法是为FPGA中的4D 8PSK-TCM的各种码率实现合适的速率调节器,以用于高数据率(600Mbps)应用。本文还讨论了卫星传输系统数据链路层中的4D-TCM用法

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