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Translating circuit behavior manifestations of hardware Trojans using model checkers into run-time Trojan detection monitors

机译:使用模型检查器将硬件木马的电路行为表现转换为运行时木马检测监视器

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摘要

It is a consensus among the researchers, although not proven, that it is close to impossible to guarantee completely secure hardware design. Therefore, it is desired to have run-time hardware Trojan detection techniques. This paper is toward developing a framework of how to achieve run-time hardware Trojan detection units. Although it is difficult to predict the stage of circuit design at which hardware intruder would insert Trojan as well as the hardware Trojan detection methodology that should be applied, behavior patterns of certain design units in the hardware can indicate malicious activities in the design. We propose to translate such behavior patterns using formal verification approaches to establish run-time hardware Trojan detection technique leading which can improve the resiliency of hardware designs against hardware Trojan. We examine the possibility of malicious intrusions in both combinational and sequential circuits that may result in functional incorrectness, and applied our methodology in two example circuits.
机译:尽管没有得到证实,但研究人员之间的共识是,要保证完全安全的硬件设计几乎是不可能的。因此,希望具有运行时硬件Trojan检测技术。本文旨在开发一种如何实现运行时硬件特洛伊木马检测单元的框架。尽管很难预测硬件入侵者将插入特洛伊木马的电路设计阶段以及应采用的硬件特洛伊木马检测方法,但是硬件中某些设计单元的行为模式可以指示设计中的恶意活动。我们建议使用正式的验证方法来转换此类行为模式,以建立运行时硬件Trojan检测技术,从而提高硬件设计对硬件Trojan的弹性。我们研究了组合电路和顺序电路中恶意入侵的可能性,这些恶意入侵可能导致功能不正确,并将我们的方法应用于两个示例电路中。

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