首页> 外文会议>2017 IEEE Nordic Circuits and Systems Conference: NORCHIP and International Symposium of System-on-Chip >Unrolled layered architectures for non-surjective finite alphabet iterative decoders
【24h】

Unrolled layered architectures for non-surjective finite alphabet iterative decoders

机译:用于非排斥性有限字母迭代解码器的展开分层体系结构

获取原文
获取原文并翻译 | 示例

摘要

This paper proposes cost efficient very high throughput layered decoding architecture for array quasi-cyclic Low-Density Parity-Check (QC-LDPC) codes, targeting tens of Gbps data rates. The targeted throughput is achieved by employing layer unrolling, with pipeline stages inserted in between layers. In order to obtain improved hardware efficiency for the decoder, multiple codewords are processed simultaneously. This leads to increased memory overhead. In order to reduce the associated cost, approximate message storage using Non Surjective-Finite Alphabet Iterative Decoding (NS-FAID) compression tables is employed. Cost efficiency is achieved by hardwired interconnects, compressed message storage using the NS-FAID, as well the A Posteriori Log-Likelihood Ratio (AP-LLR) message memory removal. Several compression tables are evaluated using the Throughput to Area Ratio (TAR) metric.
机译:本文针对阵列准循环低密度奇偶校验(QC-LDPC)码,提出了具有成本效益的超高吞吐量分层解码架构,目标是数十Gbps的数据速率。通过使用层展开(在层之间插入管道阶段)来实现目标吞吐量。为了获得用于解码器的改进的硬件效率,同时处理多个码字。这导致增加的内存开销。为了减少相关的成本,采用了使用非逐词有限字母迭代解码(NS-FAID)压缩表的近似消息存储。通过硬连线互连,使用NS-FAID压缩消息存储以及去除后验对数似然比(AP-LLR)消息内存来实现成本效益。使用吞吐量与面积之比(TAR)度量标准评估几个压缩表。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号