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Performance enhancement in active power filter (APF) by FPGA implementation

机译:通过FPGA实现增强有源功率滤波器(APF)的性能

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摘要

The generated electrical power in present days is not able meet its end user requirement as power demand is gradually increasing and expected to be increasing more in future days. In the power quality management the parameters/factors like harmonic currents (HC) and reactive power (RP) yields the major issues in the power distribution units causing transformer heating, line losses and machine vibration. In order to overcome these issues several control mechanisms has been presented and implemented in recent past. The mechanism procedure based on synchronous reference frame (SRF) offers better response by dividing the HC and RP. But the SRF based mechanism procedure requires better synchronization among the utility voltage and input current. To achieve this, the existing researches have used digital signal processing (DSP) and microcontroller but these systems fails to provide better performance as they face issues like limited sampling time, less accuracy and high computational complexity. Thus, to enhance the performance of active power filter (APF) we present FPGA based methodology. Also, the performance authorization of the proposed approach, we have used Xilinx 14.7 and Modelsim (6.3f) simulator and compared with the work of [14]. From the results analysis it is found that the approach has got better performance than [14].
机译:由于电力需求逐渐增加,并且预计未来几天还会增加,因此当前产生的电力无法满足最终用户的需求。在电能质量管理中,诸如谐波电流(HC)和无功功率(RP)之类的参数/因素会在配电单元中产生主要问题,从而导致变压器发热,线路损耗和机器振动。为了克服这些问题,最近提出并实施了几种控制机制。通过划分HC和RP,基于同步参考帧(SRF)的机制过程提供了更好的响应。但是,基于SRF的机制过程需要在市电电压和输入电流之间实现更好的同步。为了达到这个目的,现有的研究已经使用了数字信号处理(DSP)和微控制器,但是这些系统由于面临采样时间有限,准确性较低和计算复杂性高等问题而无法提供更好的性能。因此,为了增强有源功率滤波器(APF)的性能,我们提出了基于FPGA的方法。同样,对于所提出方法的性能授权,我们使用了Xilinx 14.7和Modelsim(6.3f)仿真器,并与[14]的工作进行了比较。从结果分析中发现,该方法具有比[14]更好的性能。

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