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首页> 外文会议>45th Southeastern Symposium on System Theory >The use of error correcting codes for nanoelectronic systems: Overview and future prospects
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The use of error correcting codes for nanoelectronic systems: Overview and future prospects

机译：纠错码在纳米电子系统中的使用：概述和未来前景

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As CMOS devices scale to the very deep submicron (VDSM) regime they become more susceptible to transient faults such as memory bit flips due to alpha particles as well as permanent faults due to manufacturing issues. As the transition is made to emerging nanotechnologies, such as carbon nanotube transistors, the reliability of the electronic components will increasingly become a critical concern. One important solution is to borrow an idea from communication theory and use error correcting codes to improve performance. The interconnect or logic circuitry are analogous to a noisy communication channel. The use of error correcting codes (ECCs) has the potential to improve the computational capacity of the nanoscale circuitry and wires. This paper will survey the field of proposed solutions for use of ECCs in the area of interconnect and logic circuits. Discussion of the current state-of-the-art approaches is provided and some suggestions for future work for making ECCs a viable method of improving the performance of nanoelectronic systems is given.
机译：随着CMOS器件扩展到非常深的亚微米（VDSM）机制，它们变得更容易受到瞬态故障的影响，例如由于alpha粒子引起的存储位翻转以及由于制造问题引起的永久性故障。随着向新兴纳米技术（例如碳纳米管晶体管）的过渡，电子组件的可靠性将越来越成为关键问题。一个重要的解决方案是借鉴通信理论的思想，并使用纠错码来提高性能。互连或逻辑电路类似于嘈杂的通信通道。纠错码（ECC）的使用具有提高纳米级电路和导线的计算能力的潜力。本文将调查在互连和逻辑电路领域使用ECC的建议解决方案领域。提供了对当前最先进方法的讨论，并为使ECC成为提高纳米电子系统性能的可行方法的未来工作提供了一些建议。

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