eSLAM: An Energy-Efficient Accelerator for Real-Time ORB-SLAM on FPGA Platform^*

机译：eSLAM：用于FPGA平台上的实时ORB-SLAM的节能加速器^*

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摘要

Simultaneous Localization and Mapping (SLAM) is a critical task for autonomous navigation. However, due to the computational complexity of SLAM algorithms, it is very difficult to achieve real-time implementation on low-power platforms. We propose an energy-efficient architecture for real-time ORB (Oriented-FAST and Rotated-BRIEF) based visual SLAM system by accelerating the most time-consuming stages of feature extraction and matching on FPGA platform. Moreover, the original ORB descriptor pattern is reformed as a rotational symmetric manner which is much more hardware friendly. optimizations including rescheduling and parallelizing are further utilized to improve the throughput and reduce the memory footprint. Compared with Intel i7 and ARM Cortex-A9 CPUs on TUM dataset, our FPGA realization achieves up to 3imes and 31imes frame rate improvement, as well as up to 71imes and 25imes energy efficiency improvement, respectively.

机译：同步定位和映射（SLAM）是自主导航的关键任务。但是，由于SLAM算法的计算复杂性，很难在低功耗平台上实现实时实现。通过在FPGA平台上加速特征提取和匹配的最耗时阶段，我们提出了一种基于实时ORB（定向FAST和Roted-BRIEF）的可视SLAM系统的节能架构。而且，原始的ORB描述符模式以旋转对称的方式进行了重构，这对硬件更加友好。进一步利用包括重新调度和并行化在内的优化来提高吞吐量并减少内存占用。与TUM数据集上的Intel i7和ARM Cortex-A9 CPU相比，我们的FPGA实现了高达3倍和31倍的帧率提升，以及高达71倍和25倍的能效提升，分别。

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来源
《2019 56th ACM/IEEE Design Automation Conference》|2019年|1-6|共6页
会议地点 Las Vegas(US)
作者
Runze Liu; Jianlei Yang; Yiran Chen; Weisheng Zhao;
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作者单位

School of Computer Science and Engineering, Beihang University, Beijing, 100191, China;

School of Computer Science and Engineering, Beihang University, Beijing, 100191, China;

Department of Electrical and Computer Engineering, Duke University, Durham, NC, 27708, USA;

School of Electronic and Information Engineering, Beihang University, Beijing, 100191, China;

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原文格式 PDF
正文语种 eng
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关键词
Feature extraction; Simultaneous localization and mapping; Visualization; Field programmable gate arrays; Acceleration; Computer architecture; Optimization;

机译：特征提取;同时定位和映射;可视化;现场可编程门阵列;加速;计算机体系结构;优化;;

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1. Heterogeneous Computing Utilizing FPGAs: A New and Flexible Approach Integrating Dedicated Hardware Accelerators into Common Computing Platforms [J] . Reichenbach Marc, Holzinger Philipp, Haeublein Konrad, Journal of signal processing systems for signal, image, and video technology . 2019,第7期

机译：利用FPGA的异构计算：一种将专用硬件加速器集成到通用计算平台中的灵活新方法
2. Energy-efficient FPGA Spiking Neural Accelerators with Supervised and Unsupervised Spike-timing-dependent-Plasticity [J] . Liu Yu, Yenamachintala Sai Sourabh, Li Peng ACM Journal on Emerging Technologies in Computing Systems . 2019,第3期

机译：节能FPGA尖刺神经加速器，具有监督和无监督的峰值时序依赖性可塑性
3. Choosing a Real-Time Platform: FPGAs vs. Real-Time Operating Systems [J] . Dan Strassberg Electrical Design News . 2004,第9期

机译：选择实时平台：FPGA与实时操作系统
4. eSLAM: An Energy-Efficient Accelerator for Real-Time ORB-SLAM on FPGA Platform* [C] . Runze Liu, Jianlei Yang, Yiran Chen, ACM/IEEE Design Automation Conference . 2019

机译：ESLAM：用于FPGA平台上的实时ORB-SLAM的节能加速器 *
5. Scalable Hardware Accelerator Design for FPGA Platforms [D] . Bharucha, Ushma Sunil. 2020

机译：用于FPGA平台的可扩展硬件加速器设计
6. EDSSA: An Encoder-Decoder Semantic Segmentation Networks Accelerator on OpenCL-Based FPGA Platform [O] . Hongzhi Huang, Yakun Wu, Mengqi Yu, 2020

机译：EDSSA：基于OpenCL的FPGA平台上的编码器 - 解码器语义分段网络加速器
7. iELAS: An ELAS-Based Energy-Efficient Accelerator for Real-Time Stereo Matching on FPGA Platform [O] . Tian Gao, Zishen Wan, Yuyang Zhang, 2021

机译：Ielas：基于ELAS的节能加速器，用于FPGA平台上的实时立体声匹配

eSLAM: An Energy-Efficient Accelerator for Real-Time ORB-SLAM on FPGA Platform*

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eSLAM: An Energy-Efficient Accelerator for Real-Time ORB-SLAM on FPGA Platform^*