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Lagrangian Relaxation for Gate Implementation Selection

机译:拉格朗日放宽的门实施选择

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In a typical circuit optimization flow, one essential decision is to select the implementation for each gate according to a cell library. An implementation implies specific gate size, threshold voltage, etc. The selection normally needs to handle multiple and often conflicting objectives. An effective approach for multi-objective optimization is Lagrangian relaxation (LR), which has been adopted in continuous gate sizing. When LR is applied to the gate implementation selection, the Lagrangian dual problem is no longer convex like in continuous gate sizing, and conventional sub-gradient method becomes inefficient. In this paper, we propose a projection-based descent method and a new technique of Lagrangian multiplier distribution for solving the Lagrangian dual problem in discrete space. Experimental results demonstrate that our approach leads to significantly better solution quality and faster convergence compared to the sub-gradient method.
机译:在典型的电路优化流程中,一个重要的决定是根据单元库为每个门选择实现。一种实现方式意味着特定的栅极尺寸,阈值电压等。选择通常需要处理多个且经常相互冲突的目标。一种用于多目标优化的有效方法是拉格朗日松弛(LR),它已在连续浇口尺寸确定中采用。当将LR应用于门的实现选择时,拉格朗日对偶问题不再像连续门定尺寸那样凸出,并且常规的次梯度法变得无效。在本文中,我们提出了一种基于投影的下降方法和拉格朗日乘数分布的新技术来解决离散空间中的拉格朗日对偶问题。实验结果表明,与次梯度方法相比,我们的方法可显着提高解决方案质量,并加快收敛速度​​。

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