TELIOS: A Tool for the Automatic Generation of Logic Programming Machines

机译：TELIOS：自动生成逻辑编程机的工具

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In this paper the tool TELIOS is presented, for the automatic generation of a hardware machine, corresponding to a given logic program. The machine is implemented using an FPGA, where a corresponding inference machine, in application specific hardware, is created on the FPGA, based on a BNF parser, to carry out the inference mechanism. The unification mechanism is based on actions embedded between the non-terminal symbols and implemented using special modules on the FPGA.

机译：在本文中，提供了工具ELIOOS，用于自动生成硬件机器，该工具与给定的逻辑程序相对应。该机器是使用FPGA实现的，其中基于BNF解析器在FPGA上创建了专用硬件中的相应推理机，以执行推理机制。统一机制基于嵌入在非终端符号之间的动作，并使用FPGA上的特殊模块实现。

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《Artificial intelligence applications and innovations III》|2009年|523-528|共6页
会议地点 Thessaloniki(GR);Thessaloniki(GR)
作者
Alexandros C. Dimopoulos; Christos Pavlatos; George Papakonstantinou;
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作者单位

National Technical University of Athens, School of Electrical and Computer Engineering, Iroon Polytechneiou, Zografou 15773, Athens, Greece;

National Technical University of Athens, School of Electrical and Computer Engineering, Iroon Polytechneiou, Zografou 15773, Athens, Greece;

National Technical University of Athens, School of Electrical and Computer Engineering, Iroon Polytechneiou, Zografou 15773, Athens, Greece;

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正文语种 eng
中图分类人工智能理论;
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TELIOS: A Tool for the Automatic Generation of Logic Programming Machines

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