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首页> 外文会议>Conference on Real-Time Image Processing; 20080128-29; San Jose,CA(US) >Streaming Warper with Cubic Spline Interpolation for Rectification of Distorted Images on FPGAs
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Streaming Warper with Cubic Spline Interpolation for Rectification of Distorted Images on FPGAs

机译：带三次样条插值的流整经器，用于在FPGA上校正失真的图像

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摘要

For industrial print flaw detection images are acquired and then compared to a specimen (master image). Due to the production process, the images are not exactly aligned to each other. Therefore, preceding a pixel-by-pixel comparison, the acquired image has to be rectified in order to match the master image's properties - it has to be warped into the master image's coordinate system. To achieve the required detection speed, several Megapixels per second have to be processed. It proved to be very advantageous to continuously process the stream of image data in an image processing pipeline. The first stage is the warping process. In this paper we introduce a streaming warper unit which implements affine backward mapping and cubic spline interpolation. Since a complete pixel transformation is computed per clock cycle the performance - implemented on contemporary FPGA devices - can be up to 200 Megapixels per second. The implementation of several streaming warper units within a single FPGA is possible. This enables image processing systems which allow high data rates even under real-time constraints.
机译：对于工业印刷缺陷检测，获取图像，然后将其与样本（主图像）进行比较。由于生产过程的原因，图像之间无法完全对齐。因此，在逐像素比较之前，必须校正采集的图像以匹配主图像的属性-必须将其扭曲到主图像的坐标系中。为了达到所需的检测速度，每秒必须处理几百万像素。事实证明，在图像处理管道中连续处理图像数据流非常有利。第一阶段是翘曲过程。在本文中，我们介绍了一种实现仿射反向映射和三次样条插值的流式整经器单元。由于每个时钟周期都会计算出一个完整的像素转换，因此在当代FPGA器件上实现的性能可以达到每秒200兆像素。在单个FPGA中可以实现多个流式整经器单元。这使得图像处理系统即使在实时约束下也可以实现高数据速率。

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