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Provably Secure Higher-Order Masking of AES

机译:可证明安全的AES高阶掩蔽

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Implementations of cryptographic algorithms are vulnerable to Side Channel Analysis (SCA). To counteract it, masking schemes are usually involved which randomize key-dependent data by the addition of one or several random value(s) (the masks). When dth-order masking is involved (i.e. when d masks are used per key-dependent variable), the complexity of performing an SCA grows exponentially with the order d. The design of generic dth-order masking schemes taking the order d as security parameter is therefore of great interest for the physical security of cryptographic implementations. This paper presents the first generic dth-order masking scheme for AES with a provable security and a reasonable software implementation overhead. Our scheme is based on the hardware-oriented masking scheme published by Ishai et al. at Crypto 2003. Compared to this scheme, our solution can be efficiently implemented in software on any general-purpose processor. This result is of importance considering the lack of solution for d ≥ 3.
机译:加密算法的实现容易受到边信道分析(SCA)的影响。为了抵消它,通常涉及屏蔽方案,该方案通过添加一个或多个随机值(掩码)来使与密钥相关的数据随机化。当涉及到d阶掩码时(即,每个与键相关的变量使用d掩码时),执行SCA的复杂度随d阶呈指数增长。因此,以d为安全参数的通用d阶掩蔽方案的设计对于密码实现的物理安全性非常感兴趣。本文提出了具有可证明的安全性和合理的软件实现开销的第一个通用的dth AES通用掩码方案。我们的方案基于Ishai等人发布的面向硬件的屏蔽方案。相较于该方案,我们的解决方案可以在任何通用处理器上的软件中高效实现。考虑到对于d≥3缺乏解,这一结果非常重要。

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