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Decomposition Strategies for Self-Aligned Double Patterning

机译：自对准双图案的分解策略

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摘要

Spacer technology, a self-aligned double patterning (SADP) technique, has been drawing more and more attention due to its less stringent overlay requirements compared to other double-patterning methods. However, use of SADP techniques was previously limited by the lack of flexibility in terms of decomposition options , and significant developments were mainly implemented for 1D-type applications for memory. In this paper, we extend the SADP technique into the logic field. A matrix of design rule extraction structures was created by GLOBALFOUNDRIES, which was then decomposed into 2-mask SADP patterning solutions by Cadence Design Systems, and wafers were manufactured by Applied Materials. The wafers were processed in both positive and negative spacer tones, and then we evaluate the design capabilities of SADP for logic BEOL patterning on pitches from 56nm to 64nm. It shows that the SADP has big advantage over other pitch splitting techniques such as LELE in terms of design rules, overlay, and CD uniformity control. With SADP, the most challenging design rules for BEOL such as tip-to-tip and tip-to-line can be reduced 50% from 80 nm to 40 nm.
机译：间隔器技术是一种自对准双图案（SADP）技术，与其他双图案方法相比，由于其对覆盖的要求不严格，因此受到越来越多的关注。但是，以前由于缺乏灵活的分解选项而限制了SADP技术的使用，并且主要针对一维类型的内存应用实现了重大发展。在本文中，我们将SADP技术扩展到逻辑领域。 GLOBALFOUNDRIES创建了设计规则提取结构矩阵，然后通过Cadence Design Systems将其分解为2掩模SADP图案化解决方案，并由Applied Materials制造了晶圆。晶片均采用正负间隔音进行处理，然后我们评估了SADP在56nm至64nm间距上进行逻辑BEOL图案化的设计能力。它表明，在设计规则，覆盖和CD均匀性控制方面，SADP与其他音高分离技术（例如LELE）相比具有很大的优势。借助SADP，BEOL最具挑战性的设计规则（如针尖到针尖和针尖到线）可以从80 nm减少到40 nm，减少50％。

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