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Silicon IP Reuse Standards for Design For Manufacturability

机译：可制造性设计的Silicon IP重用标准

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摘要

Design for Manufacturability (DFM) has become a major semiconductor topic that spans various issues, including issues related to lithography hardware limitations, and issues related to variability. There is, however, an issue that crosses multiple DFM domains: the need to reuse designed Silicon IP blocks or "cores" across various manufacturing processes. Unfortunately, there are no standards to facilitate the reuse of circuit blocks while addressing the lithography- and variability-related issues. Specifically, there is no clear definition for a user of a core to evaluate "manufacturability" of a core for a set of foundry processes. We present a quantitative DFM standard for Silicon IP reuse, which addresses this problem. This work was done in conjunction with VSIA's DFM team.
机译：可制造性设计（DFM）已成为涵盖各种问题的主要半导体主题，包括与光刻硬件限制有关的问题以及与可变性有关的问题。但是，存在一个跨越多个DFM域的问题：需要在各种制造过程中重用设计的Silicon IP块或“核”。不幸的是，在解决与光刻和可变性相关的问题时，没有任何标准可以促进电路块的重用。具体而言，对于核心用户没有明确的定义来评估一组铸造过程的核心“可制造性”。我们提出了用于硅IP重用的定量DFM标准，以解决此问题。这项工作是与VSIA的DFM团队一起完成的。

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