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Annotated Layout Optimization

机译：带注释的布局优化

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The annotation of electrical information or constraints is a well established method to transfer information on design intent from the electrical to the physical designer. In this paper, we will discuss the possibility to extend the concept of annotation as vehicle to hand over critical information from the physical designer to the resolution enhancement technique (RET) engineer. Opportunities and implications to extend the existing optical proximity correction (OPC) methods from the current stage of "just print the layout on wafer" towards new approaches where the layout can be optimized during the RET/OPC step based on designers input are discussed. In addition, the benefit of using process variation information for this layout optimization will be compared to a conventional OPC approach that just tries to realize an overlapping process window at one point of the process window. The power of a combination of both approaches will be shown, based on a small test case. The target of this work is to motivate further research and development in this direction to enhance the current OPC/RET capabilities towards a more integrated solution enabling annotated layout optimization as link between design and manufacturing.
机译：电气信息或约束的注释是一种完善的方法，可以将有关设计意图的信息从电气传递给物理设计人员。在本文中，我们将讨论将注释概念扩展为将关键信息从物理设计人员移交给分辨率增强技术（RET）工程师的可能性。讨论了将现有的光学邻近校正（OPC）方法从当前的“仅在晶圆上印刷版图”阶段扩展到可以根据设计人员的输入在RET / OPC步骤中优化版图的新方法的机会和含义。另外，将使用工艺变化信息进行此布局优化的好处与传统的OPC方法进行了比较，后者只是试图在工艺窗口的某个点实现重叠的工艺窗口。基于一个小的测试案例，将展示这两种方法的组合的强大功能。这项工作的目标是朝着这个方向激励进一步的研究和开发，以增强当前的OPC / RET功能，朝着更集成的解决方案发展，从而实现带注释的布局优化，将其作为设计和制造之间的链接。

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