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首页> 外文会议>Formal Methods in Computer-Aided Design, 2009. FMCAD 2009 >A compositional theory for post-reboot observational equivalence checking of hardware
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A compositional theory for post-reboot observational equivalence checking of hardware

机译：硬件重启后观测等效性检查的组成理论

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摘要

We propose an equivalence checking theory in a wider-than-usual sense. The theory shows how to combine Formal Equivalence Checking (FEC) of specification and implementation models with Assertion Based Verification (ABV) of the specification model, and with Reboot Sequence Checking (RSC) on both models, to ensure that the implementation model has the intended logic functionality. Here, FEC is performed to ensure that the input-output behavior of the models coincides in post-reboot states. ABV ensures that the specification model has the intended logic functionality captured by temporal assertions. RSC ensures deterministic behavior of the models after reboot. We propose a flexible compositional theory for FEC, an abstraction method for ABV, and a scalable algorithm for RSC, enabling performance of all three activities in a modular, compositional manner, and largely independently: FEC and ABV are performed without knowing the actual reboot sequence (and the respective initial states) of the two models; and FEC, ABV and RSC have the same observables.
机译：我们提出了比往常更广泛的等效检查理论。该理论显示了如何将规范和实现模型的形式等效检查（FEC）与规范模型的基于断言的验证（ABV）以及两个模型上的重新启动序列检查（RSC）结合起来，以确保实现模型具有预期的功能。逻辑功能。在这里，执行FEC以确保模型的输入输出行为在重新引导后状态下重合。 ABV确保规范模型具有通过时间断言捕获的预期逻辑功能。 RSC确保重新启动后模型的确定性行为。我们提出了FEC的灵活组成理论，ABV的抽象方法和RSC的可扩展算法，从而以模块化，组成方式并且在很大程度上独立地执行所有三个活动：FEC和ABV的执行不知道实际的重启顺序（和相应的初始状态）两个模型；和FEC，ABV和RSC具有相同的可观察性。

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