Investigation of Electrical Parameters Degradations for 600V SOI-LIGBT under Repetitive ESD Stresses

机译：重复ESD应力下600V SOI-LIGBT的电参数劣化研究

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) is decreased dramatically because of hot holes injection and interface states generation at the poly-gate edge. Finally, a novel structure with an additional P-type region beneath the poly-gate edge has been proposed to suppress the device degradation under repetitive ESD stresses.

机译：由于热空穴注入和在多栅极边缘处产生界面态，大大降低了）。最后，已经提出了一种新颖的结构，该结构在多栅极边缘下方具有一个附加的P型区域，以抑制器件在重复ESD应力下的退化。

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来源
《IEEE International Symposium on Physical and Failure Analysis of Integrated Circuits》|2019年|1-4|共4页
会议地点 Hangzhou(CN)
作者
Li Lu; Ran Ye; Siyang Liu; Weifeng Sun;
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作者单位

Southeast University National ASIC System Engineering Research Center Nanjing China;

Sou;

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关键词
electrostatic discharge; failure analysis; hot carriers; insulated gate bipolar transistors; interface states; power bipolar transistors; semiconductor device reliability; silicon; silicon-on-insulator;

机译：静电放电故障分析;热载体；绝缘栅双极型晶体管；接口状态；功率双极晶体管；半导体器件的可靠性；硅;绝缘体上硅;

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Investigation of Electrical Parameters Degradations for 600V SOI-LIGBT under Repetitive ESD Stresses

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