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首页> 外文会议>IEEE Joint Conference: International Conference on IC Design and Technology amp; Solid State Systems Symposium >Placement optimization for MP-DSAL compliant layout
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Placement optimization for MP-DSAL compliant layout

机译：符合MP-DSAL布局的布局优化

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摘要

Sub 10-nm technology node requires contacts whose size and pitch are beyond optical resolution limit. Directed self-assembly lithography with multiple patterning technology (MP-DSAL) has been actively studied to support such fine features. In MP-DSAL, layout decomposition is a key problem, in which close contacts are clustered and assigned to one of masks (or colors). Many practical contact layouts are not MP-DSAL compliant in a sense that layout decomposition is not perfectly performed leaving a few coloring conflicts and unmanufacturable contact clusters. We propose to optimize placement so that layout becomes MP-DSAL compliant. A simple cell flip is employed for this purpose, and placement optimization is formulated as ILP; a practical heuristic is then proposed. Experiments demonstrate that very marginal 0.5% of cells are flipped to achieve our goal.
机译：低于10纳米的技术节点需要其尺寸和间距超出光学分辨率限制的触点。已经积极研究了具有多种图案化技术（MP-DSAL）的定向自组装光刻技术，以支持此类精细功能。在MP-DSAL中，布局分解是一个关键问题，其中紧密接触被聚类并分配给一个蒙版（或颜色）。许多实际的触点布局不符合MP-DSAL标准，因为布局分解无法完美执行，留下了一些颜色冲突和无法制造的触点簇。我们建议优化布局，使布局符合MP-DSAL标准。为此，使用了一个简单的单元翻转，并将放置优化公式化为ILP。然后提出一种实用的启发式方法。实验表明，只有0.5％的边缘细胞被翻转以实现我们的目标。

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