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An ultra low power operated logic NVM for passive UHF RFID tag applications

机译:适用于无源UHF RFID标签应用的超低功耗逻辑NVM

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摘要

An electrically programmable and erasable memory macro with low power and low voltage operation is implemented for the applications of RFID and NFC. The memory macro with single-poly NVM cell structure fabricated in 0.11μm generic CMOS logic process is proposed and characterized. With unique device and circuitry designs, silicon results demonstrate the write operation with power consumption less than 23μW. In addition, the read operation can be achieved with power consumption less than 3μW at 1MHz access speed and the read voltage down to 0.56V.
机译:针对RFID和NFC的应用,实现了具有低功耗和低电压操作的电可编程可擦存储器宏。提出并表征了采用0.11μm通用CMOS逻辑工艺制造的具有单多晶硅NVM单元结构的存储宏。通过独特的器件和电路设计,芯片结果证明了写操作的功耗低于23μW。此外,在访问速度为1MHz时,功耗小于3μW,读取电压低至0.56V,可以实现读取操作。

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