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An efficient strategy for developing a simulator for a novelconcurrent multithreaded processor architecture

机译:为新型并发多线程处理器体系结构开发模拟器的有效策略

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In developing a simulator for a new processor architecture, itnoften is not clear whether it is more efficient to write a new simulatornor to modify an existing simulator. Writing a new simulator forces thenprocessor architect to develop or adapt all of the related softwarentools. However, modifying an existing simulator and related tools, whichnare usually not well-documented, can be time-consuming and error-prone.nWe describe the SImulator for Multithreaded Computer Architecturesn(SIMCA) that was developed with the primary goal of obtaining anfunctional simulator as quickly as possible to begin evaluating thensuperthreaded architecture. The performance of the simulator itself wasnimportant, but secondary. We achieved our goal using a technique callednprocess-pipelining that exploits the unique features of this newnarchitecture to hide the details of the underlying simulator. Thisnapproach allowed us to quickly produce a functional simulator whosenperformance is only 3.8-4.9 times slower than the base simulator
机译:在为新的处理器体系结构开发模拟器时,通常不清楚编写新模拟器还是修改现有模拟器是否更有效。编写新的模拟器将迫使处理器架构师开发或改编所有相关的软件工具。但是,修改通常没有详细记录的现有模拟器和相关工具可能很耗时且容易出错。n我们描述了针对多线程计算机体系结构的SImulatorn(SIMCA),其开发的主要目的是获得功能模拟器作为尽快开始评估超线程体系结构。模拟器本身的性能并不重要,但却是次要的。我们使用一种称为“过程流水线”的技术实现了我们的目标,该技术利用了这种新体系结构的独特功能来隐藏底层模拟器的细节。这种方法使我们能够快速生产功能模拟器,其性能仅比基本模拟器慢3.8-4.9倍

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