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首页> 外文会议>IFIP(International Federation for Information Processing) WG 10.2 International Workshop on Software Technologies for Embedded and Ubiquitous Systems(SEUS 2007); 20070507-08; Santorini Island(GR) >Algorithmic Skeletons for the Programming of Reconfigurable Systems
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Algorithmic Skeletons for the Programming of Reconfigurable Systems

机译：可重构系统编程的算法框架

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摘要

Reconfigurable hardware such as FPGAs combines performance and flexibility, two inherent requirements of many modern electronic devices. Moreover, using reconfigurable devices, time to market can be reduced while simultaneously cutting the costs. However, the design of systems that beneficially explore the reconfiguration capabilities of modern FPGAs is cumbersome and little automated. In this work, a new approach is described that starts from a very high level of abstraction, so-called algorithmic skeletons, and exploits the additional information of this level of abstraction to beneficially execute on reconfigurable devices. Particularly, the approach focuses on dynamic run-time reconfiguration on partially reconfigurable FPGAs. As a first introduction to this approach, we consider stream parallelism paradigms including their composition.
机译：FPGA等可重配置硬件结合了性能和灵活性，这是许多现代电子设备的两个固有要求。此外，使用可重构设备，可以缩短上市时间，同时降低成本。但是，有益地探索现代FPGA的重新配置功能的系统设计麻烦且几乎没有自动化。在这项工作中，描述了一种新方法，该方法从很高的抽象级别（所谓的算法框架）开始，并利用此抽象级别的附加信息在可重配置设备上有利地执行。特别地，该方法侧重于部分可重新配置的FPGA上的动态运行时重新配置。作为对此方法的首次介绍，我们考虑流并行性范式，包括其组成。

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