Partial Sum Based Algorithm for the Discrete Cosine Transform

机译：基于部分和的离散余弦变换算法

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In this paper, a fast algorithm and its corresponding hardware structure are developed for the 2~M × 2~M type Discrete Cosine Transform. The transform output is transformed into a mul-add format by the definition of the 2-D DCT/IDCT. The output data set is partitioned into several subsets each having the same multiplicands that we call partial sum. By computing partial sum, the addition and multiplication operation times can be greatly reduced. In final, its corresponding hardware architecture is presented for VLSI implementation. The synthesis result shows that the algorithm is efficient and reliable.

机译：本文针对2〜M×2〜M型离散余弦变换，开发了一种快速算法及其相应的硬件结构。通过二维DCT / IDCT的定义，将转换输出转换为mul-add格式。输出数据集被分为几个子集，每个子集具有相同的被乘数，我们称之为部分和。通过计算部分和，可以大大减少加法和乘法运算时间。最后，介绍了其相应的硬件架构，以用于VLSI实现。综合结果表明，该算法是有效和可靠的。

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《International Conference on ITS(Intelligent Transport Systems Standardization) Telecommunications Proceedings(ITST2006); 20060621-23; Chengdu(CN)》|2006年|P.1094-1097|共4页
会议地点 Chengdu(CN)
作者
Mao Tian; Guang-Jun Li; Qi-Zong Peng;
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University of Electronic Science and Technology of China;

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原文格式 PDF
正文语种 eng
中图分类通信;
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Partial Sum Based Algorithm for the Discrete Cosine Transform

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