A flow-through interconnection network microsystem is described. It is part of a parallel SIMD graphics architecture called Cube in which the network interconnects between n pairs of processors and memories. No two accesses involve the same memory or processor and their is an uniform communication distance among the processors. The interconnection network is based on a modular and VLSI implemented barrel switch (BS) unit, which provides modularity and flexibility of the entire network. A rotate distance of up to 16 processor-memory pairs is performed in a flow-through manner in a single machine cycle. Structurally, the BS is organized in a simple and repetitive pattern of junction elements and connection paths, extendable in its overall length and its data width, and suited for VLSI implementation.
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