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首页> 外文会议>IEEE International Conference on Consumer Electronics >Reducing Writing Energy Consumption for Non-Volatile Registers Utilizing Frequent Patterns of Sequential Bits on RISC-V Architecture
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Reducing Writing Energy Consumption for Non-Volatile Registers Utilizing Frequent Patterns of Sequential Bits on RISC-V Architecture

机译：利用RISC-V架构上利用频繁模式的频繁模式来降低非易失性寄存器的写入能耗

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Single-board computers have been widely spread and used in a variety of situations, where they may be requested to operate under low-energy conditions or with an unstable power supply. Utilizing non-volatile memory (NVM) retaining data without power must be one of the effective solutions to tackle this issue. However, compared to volatile memory such as SRAM and DRAM, NVM consumes more energy in writing operations. In this paper, we propose an effective energy reduction method for RISC-V architecture, targeting one of NVMs called spin-transfer torque RAMs (STT-RAM). Firstly, we thoroughly investigate the writing bit patterns to registers in RISC-V architecture for various typical application programs and find out that most of them can be classified into three patterns, in which most bits in writing 32-bit data are 0s (zero’s). Secondly, we propose an energy-reduced register-writing method utilizing these frequent writing bit patterns. In this method, when a writing data falls into one of the three frequent bit writing patterns above, we just write the bit pattern type into the extra bits and do not write actual data into registers and hence we can reduce the write energy in NVM register writing extremely. Experimental results on RISC-V architecture demonstrate that the energy consumption is reduced by 12.5%–53.8% by using our proposed method compared to the baseline architecture.
机译：单板计算机已广泛传播并在各种情况下使用，在那里可以要求它们在低能量条件下或具有不稳定电源的情况下运行。利用非易失性存储器（NVM）保留数据，无电源必须是解决此问题的有效解决方案之一。然而，与SRAM和DRAM等挥发性存储器相比，NVM在写作操作中消耗更多的能量。在本文中，我们提出了一种用于RISC-V架构的有效能量还原方法，瞄准名为旋转转移扭矩柱塞（STT-RAM）的NVM之一。首先，我们彻底地研究了写入位模式以寄存在RISC架构中的risc-v架构中的各种典型应用程序，并找出它们中的大多数可以分为三种模式，其中大多数写入32位数据中的大多数位为0s（零） 。其次，我们提出了利用这些频繁写入位模式的能量减少的寄存器写入方法。在这种方法中，当写入数据落入上述三个频繁比特写入模式之一时，我们只需将位模式类型写入额外位，并且不会将实际数据写入寄存器，因此我们可以减少NVM寄存器中的写入能量写作非常。 RISC-V架构上的实验结果表明，与基线架构相比，通过使用我们所提出的方法，能量消耗减少了12.5％-53.8％。

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