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REAL-TIME COMPLEXITY CONSTRAINED ENCODING

机译:实时复杂性约束编码

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Complex software appliances can be deployed on hardware with limited available computational resources. This computational boundary puts an additional constraint on software applications. This can be an issue for real-time applications with a fixed time constraint such as low delay video encoding. In the context of High Efficiency Video Coding (HEVC), a limited number of publications have focused on controlling the complexity of an HEVC video encoder. In this paper, a technique is proposed to control complexity by deciding between 2N×2N merge mode and full encoding, at different Coding Unit (CU) depths. The technique is demonstrated in two encoders. The results demonstrate fast convergence to a given complexity threshold, and a limited loss in rate-distortion performance (on average 2.84% Bjontegaard delta rate for 40% complexity reduction).
机译:复杂的软件设备可以在具有有限的可用计算资源的硬件上部署。该计算边界对软件应用程序进行了额外的约束。这可以是具有固定时间约束的实时应用的问题,例如低延迟视频编码。在高效视频编码(HEVC)的背景下,有限数量的出版物集中于控制HEVC视频编码器的复杂性。在本文中,提出了一种通过在不同编码单元(CU)深度的2N×2N合并模式和完全编码之间来控制复杂性。该技术在两个编码器中证明。结果表明,对给定的复杂性阈值的快速会聚,以及速率变形性能的有限损失(平均为2.84%Bjontegaard Delta速率,用于减少40%的复杂性)。

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