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APPLE: Adaptive Performance-Predictable Low-Energy caches for reliable hybrid voltage operation

机译:APPLE:自适应性能可预测的低能耗高速缓存,可实现可靠的混合电压操作

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Semiconductor technology evolution enables the design of resource-constrained battery-powered ultra-low-cost chips required for new market segments such as environment, urban life and body monitoring. Caches have been shown to be the main energy and area consumer in those chips. This paper proposes simple, hybrid-operation (high Vcc, ultra-low Vcc), single-Vcc domain Adaptive Performance-Predictable Low-Energy (APPLE) L1 cache designs based on replacing energy-hungry SRAM cells by more energy-efficient and smaller cells enhanced with extra cache lines set up in an adapted victim cache to still enable strong performance guarantees. APPLE caches are proven to largely outperform existing solutions in terms of energy and area efficiency.
机译:半导体技术的发展使设计资源受限的电池供电的超低成本芯片成为了新的细分市场(如环境,城市生活和人体监测)所必需的。缓存已被证明是这些芯片中的主要能源和面积消耗者。本文提出了一种简单的混合操作(高Vcc,超低Vcc),单Vcc域自适应性能可预测的低能耗(APPLE)L1缓存设计,该设计通过用更多的能源效率和更小的体积替换耗能的SRAM单元通过在适应的牺牲者缓存中设置额外的缓存行增强了单元,从而仍可提供强大的性能保证。经证实,APPLE缓存在能源和区域效率方面大大优于现有解决方案。

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