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Application of energy reduction techniques using niched pareto GA of energy analzyer for HPC applications

机译：使用能量分析仪的准Pareto GA进行节能技术在HPC应用中的应用

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Energy consumption of High Performance Computing (HPC) architectures, on the path to exa-scale systems, is still a challenging problem among the HPC community owingto the technological issues, such as, power limitations of processor technologies, increased degree of parallelism (both in a node level and in a systemlevel), and a hefty cost of communication which arises while executing applications on such architectures. In addition, the increased electrical billing andthe other ensuing ecological hazards, including climate changes, have urgedseveral researchers to focus much on framing solutions that address the energy consumption issues of future HPC systems. Reducing the energyconsumption of HPC systems, however, is not an easy task due to its assortednature of muddled up complicated issues that are tightly dependent on the performance of applications, the energy efficiency of hardware components, and theenergy consumption of the compute center infrastructure. This paper presents Niched Pareto Genetic Algorithm (NPGA) based application of energy reduction techniques, namely, code version selection mechanism and compiler optimization switch selection mechanism, for HPC applications using EnergyAnalyzer tool. The proposed mechanism was tested with HPC applications, such as, MPI-C based HPCC benchmarks, Jacobi, PI, and matrix multiplication applications, on the HPCCLoud Research Laboratory of our premise. This paper could be of an interest to various researchers, namely, HPC application developers, performance analysis tool developers, environmentalist, and energy-awarehardware designers.
机译：由于技术问题，例如处理器技术的功率限制，并行度的提高（两者都包括在内），高性能计算（HPC）架构的能耗在exa级系统的道路上仍然是HPC社区中一个具有挑战性的问题。节点级别和系统级别），以及在此类体系结构上执行应用程序时产生的大量通信成本。此外，不断增加的电费以及随之而来的其他生态危害，包括气候变化，促使许多研究人员将重点放在解决未来HPC系统能耗问题的框架解决方案上。但是，要减少HPC系统的能耗并不是一件容易的事，因为它混杂了各种复杂问题，这些问题与应用程序的性能，硬件组件的能效和计算中心基础架构的能耗密切相关。本文介绍了基于Niched Pareto遗传算法（NPGA）的节能技术应用，即使用EnergyAnalyzer工具的HPC应用程序的代码版本选择机制和编译器优化开关选择机制。在我们所处的HPCCLoud研究实验室中，所提出的机制已通过HPC应用程序进行了测试，例如基于MPI-C的HPCC基准，Jacobi，PI和矩阵乘法应用程序。各种研究人员都可能会对本文感兴趣，这些研究人员包括HPC应用程序开发人员，性能分析工具开发人员，环保主义者和能源意识的硬件设计师。

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