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首页> 外文会议>International Symposium on Next-Generation Electronics >ESD reliability comparison of different layout topologies in the 0.25-μm 60-V nLDMOS power devices
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ESD reliability comparison of different layout topologies in the 0.25-μm 60-V nLDMOS power devices

机译：0.25μm60V nLDMOS功率器件中不同布局拓扑的ESD可靠性比较

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The impact of layout-type dependences on anti-ESD robustness in a 0.25 μm 60 V process will be investigated in this paper, which included the traditional striped-type nLDMOS, waffle-type nLDMOS, and nLDMOS embedded with a pnp-manner SCR devices. Then, these nLDMOS devices are used to evaluate the influence of layout architecture on trigger voltage (V), holding voltage (V) and secondary breakdown current (I). Eventually, it can be found that how to sketch the layout pattern of an nLDMOS is a very important issue in the anti-ESD consideration. The waffle-type nLDMOS DUT is poor contribution to I robustness due to the non-uniform turned-on phenomenon and a narrow channel width per unit finger. Therefore, the I robustness of a waffle-type nLDMOS device is decreased about 17% as compared with a traditional striped-type (reference) nLDMOS device. The ESD abilities of traditional striped-type and waffle-type nLDMOS devices with an embedded SCR (pnp-manner arrangement in the drain side) are better than a traditional nLDMOS 224.4% in average. Noteworthy, the nLDMOS-SCR (pnp-manner arrangement) is a good structure for the anti-ESD reliability in high-voltage applications.
机译：本文将研究0.25μm60 V工艺中布局类型对抗ESD鲁棒性的影响，其中包括传统的条形nLDMOS，华夫型nLDMOS和嵌入pnp-manner SCR器件的nLDMOS 。然后，这些nLDMOS器件用于评估布局架构对触发电压（V），保持电压（V）和二次击穿电流（I）的影响。最终，发现在防静电考虑中，如何绘制nLDMOS的布局图案是一个非常重要的问题。华夫格型nLDMOS DUT由于不均匀的导通现象以及每单位手指的通道宽度较窄，因此对I鲁棒性的贡献较差。因此，与传统的条纹型（参考）nLDMOS器件相比，华夫饼型nLDMOS器件的I健壮性降低了约17％。具有嵌入式SCR（漏极侧为pnp-manner布置）的传统带状和华夫型nLDMOS器件的ESD能力平均比传统nLDMOS的224.4％更好。值得注意的是，nLDMOS-SCR（pnp-manner排列）是高压应用中抗ESD可靠性的良好结构。

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