Design of novel chopper stabilized rail-to-rail operational amplifier

机译：新型斩波稳定的轨到轨运算放大器的设计

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A chip design of novel chopper stabilized operational amplifier was presented, chopper-wave modulation and demodulation was used in this architecture, and its 1/f noise was decreased largely. To extend input common mode voltage range, a novel rail-to-rail differential amplifier was adapted in the input stage. The range of input common mode voltage was from zero to power supply, and it only consumed about 22μA current. When input signal frequency was 1 KHz, and the output signal THD was only 0.01%.

机译：提出了一种新型斩波稳定型运算放大器的芯片设计，在该架构中采用了斩波调制和解调技术，使1 / f噪声大大降低。为了扩展输入共模电压范围，在输入级采用了新型的轨到轨差分放大器。输入共模电压的范围是从零到电源，并且仅消耗约22μA的电流。当输入信号频率为1 KHz时，输出信号THD仅为0.01％。

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《IEEE International Conference on ASIC》|2015年|1-4|共4页
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Xu Yong; Zhao Fei; Sun Zheng; Wu Yuanliang;
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Choppers (circuits); Rail to rail amplifiers; Rail to rail inputs; Gain; Layout; CMOS integrated circuits;

机译：斩波器（电路）;轨到轨放大器;轨到轨输入;增益;布局; CMOS集成电路;

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专利

1. A 5.6 nV/ √ Hz Chopper Operational Amplifier Achieving a 0.5 μ V Maximum Offset Over Rail-to-Rail Input Range With Adaptive Clock Boosting Technique [J] . Yoshinori Kusuda IEEE Journal of Solid-State Circuits . 2016,第9期

机译：5.6 nV /√Hz斩波运算放大器，采用自适应时钟增强技术，可在轨至轨输入范围内实现最大0.5μV的失调
2. Chopper stabilization, rail-to-rail OTA, low noise amplifier, matching clock generator [J] . Yamu Hu, Mohamad Sawan Analog Integrated Circuits and Signal Processing . 2002,第1期

机译：斩波器稳定，轨到轨OTA，低噪声放大器，匹配时钟发生器
3. A high-constant g(m) rail-to-rail operational amplifier using bump-smoothing technique with stabilized output stage [J] . Analog Integrated Circuits and Signal Processing . 2020,第2期

机译：使用具有稳定输出级的凸块平滑技术的高常数G（M）轨到轨运算放大器
4. Design of novel chopper stabilized rail-to-rail operational amplifier [C] . Xu Yong, Zhao Fei, Sun Zheng, IEEE International Conference on ASIC . 2015

机译：新型斩波器稳定轨到轨运算放大器的设计
5. Design of rail-to-rail operational amplifier using XFAB 0.35 micron process. [D] . Date, Namrata Anand. 2014

机译：使用XFAB 0.35微米工艺设计轨到轨运算放大器。
6. A 0.6-µW Chopper Amplifier Using a Noise-Efficient DC Servo Loop and Squeezed-Inverter Stage for Power-Efficient Biopotential Sensing [O] . Xuan Thanh Pham, Ngoc Tan Nguyen, Van Truong Nguyen, 2020

机译：一个0.6 µW斩波放大器采用高效噪声的DC伺服环路和压缩反相器级以实现高效节能的生物电势传感
7. A 24.88 nV/√Hz Wheatstone Bridge Readout Integrated Circuit with Chopper-Stabilized Multipath Operational Amplifier [O] . Kwonsang Han, Hyungseup Kim, Jaesung Kim, 2020

机译：A 24.88 NV /√Hz惠斯通桥读出集成电路，具有斩波稳定多径运算放大器

Design of novel chopper stabilized rail-to-rail operational amplifier

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