• 主题
高级搜索  >
历史搜索 清空历史
首页> 外文会议>IEEE International Conference on ASIC >Multi-technology simulation with mixed design environments
【24h】

Multi-technology simulation with mixed design environments

机译：混合设计环境下的多技术仿真

获取原文
页面导航
  • 摘要
  • 著录项
  • 相似文献
  • 相关主题

摘要

Typical circuit simulation flows within a design environment provided by electronic design automation (EDA) vendors only support a single foundry process technology node. But multi-chip modules (MCM) and 3D-IC designs are typically done with multiple foundry process nodes, which bring a challenge for the EDA industry on how to simulate multiple dies with different technology nodes to capture interaction effects among various dies. Although some EDA vendors have recently introduced a Multi-Technology Simulation (MTS) feature within their design tools, it is not easy for designers to use and also does not work in cross platform design environments. In this paper, we will present an internally developed MTS methodology and utility that can work with both Cadence and Keysight ADS simulation environments based on our Central Chip Repository methodology. The paper will also describe in detail the challenges of multi-technology simulation and how to address these challenges.
机译：电子设计自动化（EDA）供应商提供的设计环境中的典型电路仿真流程仅支持单个铸造工艺技术节点。但是多芯片模块（MCM）和3D-IC设计通常是通过多个铸造工艺节点完成的，这给EDA行业带来了挑战，即如何用不同的技术节点模拟多个芯片以捕获各种芯片之间的交互作用。尽管一些EDA供应商最近在其设计工具中引入了多技术仿真（MTS）功能，但设计人员使用起来并不容易，并且在跨平台设计环境中也不起作用。在本文中，我们将介绍一种内部开发的MTS方法和实用程序，该方法和实用程序可基于我们的中央芯片存储库方法与Cadence和Keysight ADS仿真环境一起使用。本文还将详细描述多技术仿真的挑战以及如何应对这些挑战。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱：kefu@zhangqiaokeyan.com

京公网安备：11010802029741号 ICP备案号：京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有

  • 客服微信

  • 服务号