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首页> 外文会议>International Conference on Information Science and Technology >A Novel Migration Technique to Balance Thermal Distribution for Future Heterogeneous 3D Chip Multiprocessors
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A Novel Migration Technique to Balance Thermal Distribution for Future Heterogeneous 3D Chip Multiprocessors

机译：一种新的迁移技术，用于平衡未来异构3D芯片多处理器的热分布

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摘要

The industry trend of Chip Multiprocessors (CMPs) architecture is to move from 2D CMPs to 3D CMPs architecture which obtains higher performance, more reliability, reduced cache access latency, and increased cache bandwidth. Moreover, 3D CMP architectures have recently gained significant attention to tackle the increasing power consumption in single core processors. However, one key challenge in designing the 3D CMP is the thermal issue as a result of maximizing the throughput. The thermal hotspot causes performance degradation and reliability reduction in the 3D CMP. In this paper, a run-time task migration approach is proposed to balance the temperature and reduce the number of hotspots in the 3D CMP without any performance degradation. The proposed approach is divided into two algorithms that aim at maximizing the throughput on the 3D CMP while satisfying the peak temperature constraint. Experimental results on the PARSEC benchmarks show that the proposed architecture yields up to 60 % reduction in overall chip energy with just 17 % performance degradation on average over all the used workloads. The best energy saving was 72 % with a negligible performance degradation.
机译：芯片多处理器（CMP）架构的行业趋势是从2D CMPS移动到3D CMPS架构，从而获得更高的性能，更可靠性，缓存访问延迟和增加的缓存带宽。此外，3D CMP架构最近获得了显着的关注，以解决单核处理器中不断增长的功耗。然而，由于最大化吞吐量，设计3D CMP时的一个关键挑战是热问题。热热点导致3D CMP的性能下降和可靠性降低。在本文中，提出了一种运行时任务迁移方法来平衡温度并减少3D CMP中的热点数量，而不会进行任何性能下降。该方法分为两种算法，该算法旨在最大化3D CMP上的吞吐量，同时满足峰值温度约束。 PARSEC基准测试结果表明，拟议架构的总体芯片能量降低了60±60±0.5±17 ％的性能下降，平均全部使用的工作负载。最好的节能是72 ％，性能下降可忽略不计。

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