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首页> 外文会议>International Symposium on Computer Architecture and High Performance Computing Workshop >An Efficient 2D Router Architecture for Extending the Performance of Inhomogeneous 3D NoC-Based Multi-Core Architectures
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An Efficient 2D Router Architecture for Extending the Performance of Inhomogeneous 3D NoC-Based Multi-Core Architectures

机译：一种有效的2D路由器体系结构，用于扩展基于非均匀3D NoC的多核体系结构的性能

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摘要

To meet the performance and scalability demands of the fast-paced technological growth towards exascale and Big-Data processing with the performance bottleneck of conventional metal based interconnects, alternative interconnect fabrics such as inhomogeneous three dimensional integrated Network-on-Chip (3D NoC) has emanated as a cost-effective solution for emerging multi-core design. However, these interconnects trade-off optimized performance for cost by restricting the number of area and power hungry 3D routers. Consequently, in this paper, we propose a low-latency adaptive router with a low-complexity single-cycle bypassing mechanism to alleviate the performance degradation due to the slow 2D routers in inhomogeneous 3D NoCs. By combining the low-complexity bypassing technique with adaptive routing, the proposed router is able to balance the traffic in the network to reduce the average packet latency under various traffic loads. Simulation shows that, the proposed router can reduce the average packet delay by an average of 45% in 3D NoCs.
机译：为了满足常规金属基互连的性能瓶颈，以百亿分之一秒和大数据处理为代表的快速技术发展对性能和可扩展性的需求，替代互连结构（例如非均质的三维集成片上集成网络（3D NoC））具有作为新兴的多核设计的一种经济高效的解决方案。但是，这些互连通过限制面积和耗电的3D路由器来权衡优化性能以降低成本。因此，在本文中，我们提出了一种具有低复杂度单周期旁路机制的低延迟自适应路由器，以缓解由于非均质3D NoC中的2D路由器缓慢而导致的性能下降。通过将低复杂度旁路技术与自适应路由相结合，所提出的路由器能够平衡网络中的流量，以减少各种流量负载下的平均数据包延迟。仿真表明，所提出的路由器在3D NoC中可以将平均数据包延迟平均降低45％。

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