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A new efficient connected component labeling algorithm and its VHDL circuit

机译：一种新的高效连通元件标注算法及其VHDL电路

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In this work, we propose a new approach for the connected component labeling task. The developed algorithm is based on a forward and backward scan of the image; from left to right and right to left and row by row. This approach takes into account the eight neighbors of the considered pixel. Unlike other algorithms that need to resolve equivalences in a second scan, with our approach we obtain at the end of the first scan an arranged table of resolved equivalent labels for each object. Another advantage of this method that a small number of labels may be required even for complicated objects. The second scan is done only to replace equivalent labels with the same representative label. These advantages make the approach more robust and sophisticated for many form recognition applications specifically for traffic signs identification which is our research subject. The software implementation of the method was firstly done using MATLAB and performances were evaluated. The simple formulation of the proposed method has enhanced the design of the VHDL circuit which is developed to be implanted on an FPGA card as part of a complete recognition system, and presented in this paper.
机译：在这项工作中，我们为连接的组件标记任务提出了一种新方法。所开发的算法基于图像的前向和后向扫描。从左到右，从右到左，并逐行显示。该方法考虑了所考虑像素的八个邻居。与需要在第二次扫描中解决等效性的其他算法不同，通过我们的方法，我们在第一次扫描结束时获得了每个对象的已解析等效标签的安排表。该方法的另一个优点是，即使对于复杂的对象，也可能需要少量的标签。进行第二次扫描仅是用相同的代表性标签替换等效标签。这些优势使该方法对于许多形式识别应用（尤其是交通标志识别）而言，更加稳健和完善，这是我们的研究课题。该方法的软件实现首先使用MATLAB进行，并评估了性能。该方法的简单表述增强了VHDL电路的设计，该电路已开发为作为完整识别系统的一部分植入到FPGA卡中，并在本文中进行了介绍。

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