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An Automated Fault Injection Platform for Fault Tolerant FFT Implemented in SRAM-Based FPGA

机译：基于SRAM的FPGA实现容错FFT的自动故障注入平台

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摘要

Soft errors caused by Single Event Upset (SEU) has become a significant threat to modern electronic systems. Aiming at reliability evaluation of fault tolerant very large scale integrated circuits implemented on SRAM-based FPGA, an automated fault injection platform via Internal Configuration Access Port (ICAP) for rapid fault injection is presented in this paper. We adopt a fault tolerant FFT processor as the Design Under Test (DUT), and a C++ application is deployed for the external fault injection control environment and automating the fault injection procedure. The proposed method can achieve quantities of repeating fault injection tests and is suitable for any fault tolerant design implemented in SRAM-Based FPGA. In this paper, we through a large number of experiments to find the critical bit which can support fault tolerant of FFT processor.
机译：单一事件不安（SEU）引起的软错误已成为现代电子系统的重大威胁。针对基于SRAM的FPGA在基于SRAM的FPGA上实现的容错非常大的集成电路的可靠性评估，本文通过内部配置访问端口（ICAP）自动故障注入平台进行了自动故障注入平台。我们采用了一个容错FFT处理器作为测试下的设计（DUT），为外部故障注入控制环境部署了C ++应用程序，并自动化故障注入过程。所提出的方法可以达到数量的重复故障注射测试，适用于基于SRAM的FPGA中实现的任何容错设计。在本文中，我们通过大量实验来找到可以支持FFT处理器容错的临界位。

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