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Modeling and optimization of the bond-wire interface in a Hybrid CMOS-photonic traveling-wave MZM transmitter

机译:混合CMOS-光子行进波MZM发射器中键合线界面的建模与优化

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Low-cost optical interconnects are playing an important role in sustaining the exponential growth in data center demand and to support the future internet-of-things cloud infrastructure. These chip-scale optical transceiver systems are integrated using two-chip bonding solution of CMOS electronic die with a silicon photonic die. In this work, modeling of the critical bond-wire is performed with electromagnetic field solver to optimize the integration of a silicon photonic transmitter, which is composed of a current mode driver in a 130 nm CMOS process and a traveling-wave Mach-Zehnder modulator (MZM) in a SOI photonic process, respectively. It is shown that the bond-wire can be optimized for bandwidth extension using series peaking with the open-drain current mode driver. However, it degrades the bandwidth when using a voltage mode driver. A compact, experimentally verified, Verilog-A model for the MZM is adopted for the electro-optical simulation. Further, it is demonstrated that a minimum length of the bond-wire and a minimum spacing between two signal bond-wires are required to ensure the bandwidth of the system with hybrid simulation. A MZM device chip-on-board wire bonded on PCB is demonstrated operating up to 12.5 Gb/s.
机译:低成本光学互连在维持数据中心需求中的指数增长以及支持未来的互联网云基础设施方面发挥着重要作用。这些芯片级光收发器系统使用CMOS电子模具的双芯片键合溶液与硅光子模具集成。在这项工作中,用电磁场求解器进行临界键线的建模,以优化硅光子发射器的集成,其由130nm CMOS工艺中的电流模式驱动器和行驶波Zehnder调制器组成。 (MZM)分别在SOI光子过程中。结果表明,使用串联峰值与开漏电流模式驱动器峰值可以优化键合线。但是,当使用电压模式驱动器时,它会降低带宽。采用紧凑,实验验证的Verilog-A电光仿真采用了MZM的模型。此外,证明了键合线的最小长度和两个信号键合线之间的最小间隔,以确保系统具有混合模拟的系统的带宽。在PCB上粘合的MZM器件芯片板上焊丝经过高达12.5 Gb / s。

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