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On-board non-regression test of HLS tools targeting FPGA

机译：针对FPGA的HLS工具的板载非回归测试

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High-Level Synthesis (HLS) has opened an opportunity for software programmers to target FPGA more rapidly. When developing HLS tools, tests are desirable to ensure their function, reliability and performance. When modifications are applied to a tool, Non- Regression Test (NRT) asserts that the changes have intended effect while Regression Test (RT) verifies that the tool still performs correctly without unwanted behaviour. The work presented in this paper is focused on a method to automatically perform Non-Regression Test in HLS tool developments, although it can also be used as a Regression Testing technique. This method relies on a framework which allows HLS tool developers to verify the circuits generated from the tool directly on FPGA, instead of using simulations. The verification flow is automatic, so that knowing the details of the system is unnecessary for developers. The framework has been tested successfully over several applications from HLS benchmark and it gives more promising results than its simulation counterpart.
机译：高级综合（HLS）为软件程序员提供了一个机会，可以更快地将目标对准FPGA。在开发HLS工具时，需要进行测试以确保其功能，可靠性和性能。当对工具进行修改时，非回归测试（NRT）断言更改具有预期的效果，而回归测试（RT）验证工具仍可正常运行而没有不良行为。本文介绍的工作着重于一种在HLS工具开发中自动执行非回归测试的方法，尽管它也可以用作回归测试技术。此方法依赖于一个框架，该框架允许HLS工具开发人员直接在FPGA上验证从该工具生成的电路，而无需使用仿真。验证流程是自动的，因此开发人员无需了解系统的详细信息。该框架已通过HLS基准测试在多个应用程序上成功进行了测试，并且比其仿真版本提供了更有希望的结果。

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