A dynamic voltage-combiners biased OTA for low-power and high-speed SC circuits

机译：用于低功率和高速SC电路的动态电压合并器偏置OTA

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This paper presents the design of a fully-dynamic voltage-combiners biased CMOS operational transconductance amplifier, for low-power high-speed analog-to-digital converters and high-performance switched-capacitor filters, using the UMC 130nm node. The biasing is controlled by switched-capacitors and simulation results of an optimized solution using AIDA-C, a state-of-the-art multi-objective multi-constraint IC optimization tool, present a DC gain of 60.9dB, a gain-bandwidth product of 155.1MHz for a 6pF load and a current consumption of 0.69mA for a sampling clock frequency of 100MHz.

机译：本文介绍了一种使用UMC 130nm节点的低功耗高速模数转换器和高性能开关电容滤波器的全动态电压组合偏置CMOS运算跨导放大器的设计。偏置由开关电容器控制，并使用AIDA-C（最先进的多目标多约束IC优化工具）优化解决方案的仿真结果，其直流增益为60.9dB，增益带宽为对于6pF负载，其乘积为155.1MHz，对于100MHz的采样时钟频率，其电流消耗为0.69mA。

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《Conference on Ph.D. Research in Microelectronics and Electronics》|2017年|121-124|共4页
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R. Póvoa; A. Canelas; R. Martins; N. Lourenço; N. Horta; J. Goes;
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Optimization; Clocks; Gain; Analog-digital conversion; Simulation; Integrated circuits; Tools;

机译：优化;时钟;增益;模数转换;仿真;集成电路;工具;

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专利

1. High-speed low-power ECL circuit with AC-coupled self-biased dynamic current source and active-pull-down emitter-follower stage [J] . Chuang C.T., Chin K. IEEE Journal of Solid-State Circuits . 1992,第8期

机译：具有交流耦合自偏置动态电流源和有源下拉发射极跟随级的高速低功耗ECL电路
2. High-speed demonstration of low-power 1 k-bit shift-register memories using LR-biasing SFQ circuits [J] . Nobuyuki Yoshikawa, Ryo Numaguchi, Toshihiro Takahashi, IEICE Electronics Express . 2016,第6期

机译：使用LR偏置SFQ电路的低功耗1 k位移位寄存器存储器的高速演示
3. A self-biased feedback-controlled pull-down emitter follower for high-speed low-power bipolar logic circuits [J] . Shin H.J. IEEE Journal of Solid-State Circuits . 1994,第4期

机译：用于高速低功耗双极性逻辑电路的自偏置反馈控制下拉发射极跟随器
4. A dynamic voltage-combiners biased OTA for low-power and high-speed SC circuits [C] . R. Póvoa, A. Canelas, R. Martins, Conference on Ph.D. Research in Microelectronics and Electronics . 2017

机译：用于低功耗和高速SC电路的动态电压组合器偏置OTA
5. High-performance mmwave circuits and low-power low-jitter high-speed interface circuits in CMOS [D] . Guo, Shita. 2015

机译：CMOS中高性能MMWAVE电路和低功耗低抖动高速接口电路
6. Application of High-speed Dual fluoroscopy to study in vivo Tibiotalar and Subtalar Kinematics in Chronic Ankle Instability Patients and Asymptomatic Controls During Dynamic Activities [O] . Koren E. Roach, K. Bo Foreman, Alexej Barg, -1

机译：高速双重荧光检查技术在研究慢性踝关节不稳患者动态活动过程中的体内胫tal骨和距骨下运动学的应用
7. High-speed demonstration of low-power 1 k-bit shift-register memories using LR-biasing SFQ circuits [O] . Toshihiro Takahashi, Ryo Numaguchi, Yuki Yamanashi, 2016

机译：低功率1 k位移寄存器存储器的高速演示使用LR偏置SFQ电路

A dynamic voltage-combiners biased OTA for low-power and high-speed SC circuits

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