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首页> 外文会议>Conference on Ph.D. Research in Microelectronics and Electronics >Improved switched capacitor cell for a 3 GHz 20 GS/s waveform digitizing ASIC
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Improved switched capacitor cell for a 3 GHz 20 GS/s waveform digitizing ASIC

机译：改进的开关电容单元，用于3 GHz 20 GS / s波形数字化ASIC

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Detectors in high energy physics (HEP) that are subject to high hit rates require fast and sophisticated instrumentation. The proposed Timing Vertex Detector (TVD) requires femtosecond resolution timing to determine the space-time coordinates of the traversing particles. One of its key components is the RFpix waveform digitizing ASIC, which is being designed to operate with an analog bandwidth of 3 GHz and sampling speed of up to 20 GS/s. The RFpix sampling architecture is based on switched capacitor arrays (SCA), which provide high channel density and low power. In this paper, analysis results of a sampling cell pertaining to a similar ASIC called PSEC4 are presented and compared to the simulation results of an improved sampling cell, designed to meet the RFpix requirements.
机译：高命中率的高能物理（HEP）检测器需要快速而精密的仪器。提议的定时顶点检测器（TVD）需要飞秒分辨率的定时来确定遍历粒子的时空坐标。它的关键组件之一是RFpix波形数字化ASIC，该ASIC设计为以3 GHz的模拟带宽和高达20 GS / s的采样速度运行。 RFpix采样架构基于开关电容器阵列（SCA），可提供高通道密度和低功耗。在本文中，提出了与名为PSEC4的类似ASIC相关的采样单元的分析结果，并将其与为满足RFpix要求而设计的改进采样单元的仿真结果进行了比较。

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