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The Secured AES designs against Fault Injection Attacks: A comparative Study

机译:针对故障注入攻击的安全AES设计:一项比较研究

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To protect the Advanced Encryption Standard (AES) against physical attacks known as fault injection attacks various fault detection schemes have been proposed. In this paper, a comparative study between the most well-known fault detection schemes in terms of fault detection capabilities and implementation cost has been proposed. In the considered study we implement, separately, the hardware, the temporal and the information redundancy for the 32-bit AES. These schemes are implemented on the Virtex-5 Xilinx FPGA board in order to evaluate their efficiency in terms of area, time costs and fault coverage
机译:为了保护高级加密标准(AES)免受称为故障注入攻击的物理攻击,已经提出了各种故障检测方案。在本文中,从故障检测能力和实现成本方面对最著名的故障检测方案进行了比较研究。在考虑的研究中,我们分别实现了32位AES的硬件,时间和信息冗余。这些方案在Virtex-5 Xilinx FPGA板上实现,以便根据面积,时间成本和故障覆盖率评估其效率。

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