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Structured Design of Reconfigurable Logic Analyzer with Complex Trigger Conditions Based on FPGA

机译：基于FPGA的复杂触发条件可重构逻辑分析仪的结构设计

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For the purpose of meeting electronic equipments' demand for various logic trigger conditions during hardware and software debugging,a new structured design technique,which has been prevailed in the domain of software design,is proposed to realize a logic analyzer(LA) with 64 sample channels and 8 trigger stages based on FPGA.Firstly,the 'triggercell',being of complete trigger functions including state-trigger,transition-trigger,compulsive trigger and shielding trigger,is realized in the VHDL hardware design language.This paper builds triggercells array provided with multi-stage trigger functions by using shift registers and user-defined structured signal array data type.Each trigger-cell in array can be programmable controlled and reconfigurable,so complex logical trigger conditions are realized in LA.Simulation results are included to illustrate the effectiveness of the LA based on FPGA,and the new structured design techniques simplify LA's upgrading.
机译：为了满足电子设备在硬件和软件调试过程中对各种逻辑触发条件的需求，提出了一种新的结构化设计技术，该技术已在软件设计领域得到普遍应用，以实现具有64个样本的逻辑分析仪（LA）。通道和8个基于FPGA的触发级。首先，以VHDL硬件设计语言实现“触发单元”，具有状态触发，转换触发，强制触发和屏蔽触发等完整的触发功能。通过使用移位寄存器和用户定义的结构化信号阵列数据类型提供多级触发功能。阵列中的每个触发单元都可以进行可编程控制和重新配置，因此在洛杉矶实现了复杂的逻辑触发条件。基于FPGA的LA的有效性以及新的结构化设计技术简化了LA的升级。

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