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首页> 外文会议>2011 IEEE Cool Chips XIV >Multi-Gbps 60-GHz single-carrier system using a low-power coherent detection technique
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Multi-Gbps 60-GHz single-carrier system using a low-power coherent detection technique

机译：采用低功率相干检测技术的多Gbps 60 GHz单载波系统

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We describe a multi-Gbps 60-GHz single-carrier system using a low-power coherent detection technique. To realize low-power operation at such a high data rate, it is crucial to design the system with reduced oversampling factor and bit depth. A table-based IQ phase rotator and a time-domain polyphase equalizer have been designed for realizing a robust and low-power coherent link under these conditions with rounding-error-free operations and effective interpolations. The entire baseband signal processing is implemented in FPGAs and we are successful in multi-Gbps per-packet transmissions per the IEEE 802.15.3c single-carrier PHY (SC-PHY) format for π/2-BPSK and π/2-QPSK modulations at a full data rate. We confirmed that the 60-GHz single-carrier system can be robust to the carrier and sampling frequency offsets within 50 ppm, even with 2× oversampling factor and 3-bit ADCs, which can lower the power consumption.
机译：我们使用低功率相干检测技术描述了一种多GBPS 60-GHz单载波系统。为了以这种高数据速率实现低功率操作，对于使用减少的过采样系数和比特深度设计系统至关重要。设计了一种基于表的IQ相位旋转器和时域多相均衡器，用于在这些条件下实现具有圆形无差错操作和有效插值的鲁棒和低功耗的相干链路。整个基带信号处理在FPGA中实现，我们在每个IEEE 802.15.3C单载波（SC-PHY）格式的单载波（SC-PHY）格式中成功，用于π/ 2-BPSK和π/ 2-QPSK调制以完整的数据速率。我们确认，60-GHz单载体系统对载波和采样频率偏移可以稳健，即使有2×过采样系数和3位ADC，也可以降低功耗。

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