A new architecture for the generation of picture based CAPTCHA: A level constrained CSE low power synthesis methodology for fixed point FIR filters

机译：用于生成基于图片的CAPTCHA的新架构：用于定点FIR滤波器的电平受限CSE低功耗综合方法

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The problem of designing FIR filters has received a great attention during the last decade, as the filters are suffering from a large number of multiplications, leading to excessive area and power consumption even if implemented in full custom integrated circuits. Early works have focused on replacing multiplications by decomposing them into simple operations such as addition, subtraction and shifting. As the coefficients of an application specific filter are constant, the decomposition is more efficient than employing multipliers. For complexity mitigation all coefficients of a transposed-form FIR filter are considered as a whole and replaced by a single multiplier block. This is been done using the CSD based technique. The redundancy across the coefficients in the multiplier block is then exploited to share computations and reduce the number of adders. To effectively enable such sharing, a variety of methods have been developed. In this paper a CSE based low power synthesis methodology has been analyzed for the purpose of better power reduction compared to the previous methods.

机译：在过去的十年中，设计FIR滤波器的问题受到了极大的关注，因为滤波器遭受了大量的乘法运算，即使在完全定制的集成电路中实现，也会导致面积和功耗的过大。早期工作着重于通过将乘法分解为简单的运算（例如加法，减法和移位）来代替乘法。由于专用滤波器的系数是恒定的，因此分解比采用乘法器更有效。为了减轻复杂性，将转置形式的FIR滤波器的所有系数视为一个整体，并由一个乘法器块代替。这是使用基于CSD的技术完成的。然后利用乘法器块中系数的冗余来共享计算并减少加法器的数量。为了有效地实现这种共享，已经开发了多种方法。在本文中，基于CSE的低功耗合成方法已进行了分析，目的是与以前的方法相比，可以更好地降低功耗。

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《2011 3rd International Conference on Electronics Computer Technology》|2011年|p.386-389|共4页
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Nidhi M. A.; Jackuline S.; Jeevitha J.;
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中图分类计算技术、计算机技术;
关键词
FIR Filter; common sub-expression elimination; complexity mitigation;

机译：FIR滤波器;常见的子表达式消除;复杂度减轻;

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1. Variation-Aware Low-Power Synthesis Methodology for Fixed-Point FIR Filters [J] . Choi J. H., Banerjee N., Roy K. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems . 2009,第1期

机译：定点FIR滤波器的变化感知低功耗综合方法
2. Synthesis of Low-Power Area Efficient Constant Multiplier Architecture for Reconfigurable Fir Filter Using Hybrid Form [J] . Nanthini B., Ganesamoorthy B. Australian Journal of Basic and Applied Sciences . 2016,第2016期

机译：用于混合滤波器的可重构冷杉滤波器的低功率面积有效常数乘法器架构综合
3. A Novel Architecture for Low Power Equiripple Half-Band FIR Filter using GDI Based Dual Edge Triggered Flip-Flop [J] . Mukherjee Biswarup, Ghosal Aniruddha Journal of land use science . 2018,第1a3期

机译：基于GDI的双边缘触发触发器的低功耗平衡半带FIR滤波器的新型架构
4. A new architecture for the generation of picture based CAPTCHA: A level constrained CSE low power synthesis methodology for fixed point FIR filters [C] . Nidhi M. A., Jackuline S., Jeevitha J. International Conference on Electronic Computer Technology . 2011

机译：基于图片的CAPTCHA的新架构：固定点FIR滤波器的级别约束CSE低功耗合成方法
5. Polyphase structure-based approaches for FIR Mth-band filters and constrained filter banks: Design, implementation and applications. [D] . Wu, Chao. 2007

机译：FIR Mth频带滤波器和受约束滤波器组的基于多相结构的方法：设计，实现和应用。
6. Low Power Adder Based Auditory Filter Architecture [O] . P. F. Khaleelur Rahiman, V. S. Jayanthi -1

机译：基于低功耗加法器的听觉滤波器架构
7. High-speed and low power dissipation architecture for higher-order FIR filters with very small latency [O] . Yoshitaka Tsunekawa, Takeshi Nozaki, Mamoru Miura 1998

机译：高阶和低功耗架构，具有非常小的延迟的高阶FIR滤波器

A new architecture for the generation of picture based CAPTCHA: A level constrained CSE low power synthesis methodology for fixed point FIR filters

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